Internal generation of reference voltage

Details Internal generation of reference voltage Internal generation of reference voltage

2002-04-30

2004-06-01

Cuneo, Kamand (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S1540PB

Reexamination Certificate

active

06744271

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to integrated circuits, and, more particularly, to an integrated circuit that selects between an internal reference voltage and an external reference voltage dependent at least in part upon the mode of operation of the IC.
BACKGROUND OF THE INVENTION
Many integrated circuit interface standards, such as, for example, stub series terminated logic second version (SSTO
—
2), require the use of a reference voltage pin. During operation of the integrated circuit (IC), all input signals are referenced to the voltage applied to the reference voltage pin, i.e., the reference voltage, in order to determine whether the input signal is a logic high or low level.
The reference voltage must also be applied to the reference voltage pin during testing. Test systems for ICs typically generate the reference voltage in one of several ways, including a driver pin, power supply or a direct current measurement unit. IC test systems generally require a high degree of parallelism, i.e., duplicate tester resources for each and every device under test (DUT). Thus, the method or device used to generate the reference voltage is duplicated for each DUT in order to ensure integrity of the reference voltage signal.
The need for an IC testing system to duplicate the method or device of used to generate the reference voltage for each DUT increases the cost and complexity of the testing system. Further, the need to duplicate the method or device used to generate the reference voltage for each DUT limits the capacity of the testing system, i.e., limits the number of DUTs that can be simultaneously tested by the system.
Therefore, what is needed in the art is a method and apparatus for generating the reference voltage that does not consume testing system resources.
Furthermore, what is needed in the art is a method and apparatus for generating the reference voltage that does not limit the capacity of the testing system.
SUMMARY OF THE INVENTION
The present invention provides an integrated circuit (IC) that selects between an internal reference voltage and an external reference voltage dependent at least in part upon the mode of operation of the IC.
The invention comprises, in one form thereof, an integrated circuit (IC) configured for being connected to an external reference voltage. The IC uses an IC reference voltage to determine the logic levels of signals applied to the IC. The IC includes means for generating an internal reference voltage and means for selecting one of the internal reference voltage and the external reference voltage for use as the IC reference voltage dependent at least in part upon the operational mode of the IC
An advantage of the present invention is that the reference voltage is generated without requiring testing system resources.
A further advantage of the present invention is that the testing system capacity is not limited by generation of the reference voltage.


REFERENCES:
patent: 5563546 (1996-10-01), Tsukada
patent: 5973571 (1999-10-01), Suzuki
patent: 6094075 (2000-07-01), Garrett et al.
patent: 6407571 (2002-06-01), Furuya et al.
patent: 6457148 (2002-09-01), Yoshiba
patent: 6489819 (2002-12-01), Kono et al.

Affiliated with

Also associated with

Rating

Internal generation of reference voltage does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Internal generation of reference voltage, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Internal generation of reference voltage will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3352693