Intermittent receiver

Details Intermittent receiver Intermittent receiver

1988-01-12

1988-11-15

Griffin, Robert L.

Pulse or digital communications

Repeaters

Testing

375 90, 375119, 455343, H04L 2714, H04L 702, H04B 118

Patent

active

047854685

ABSTRACT:
In intermittent receiver comprises a shift register, a time signal generator including a decoder connected to receive at least a portion of parallel data outputs of the shift register so as to generate a time signal and a delayed detector including an exclusive-OR gate receiving a serial data output of the shift register and a reception signal so as to generate a detection signal. A first selection circuit has one output connected to the serial data input of the shift register and a first input connected to receive a feedback signal from of the time signal generator and a second input connected to receive the reception signal, and a second selection circuit has an output connected to the clock input of the shift register and a pair of inputs connected to receive a pair of different clocks. Further, a controller receives the time signal from the decoder for controlling the conditions of the first and second selection circuits. When the time signal is indicative of a wait mode, one of the clock signals is outputted to the shift register so that the time signal generator operates. When the time signal is brought into a condition indicative of a receptiom mode, the other clock signals is supplied to the shift register and the reception signal is fed to the shift register so that delayed detector operates to execute the delayed detection for the reception signal.

REFERENCES:
patent: 3996581 (1976-12-01), Brodeur et al.
patent: 4181893 (1980-01-01), Ehmke
patent: 4340973 (1982-07-01), Umetsu
patent: 4479261 (1984-10-01), Oda et al.

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