Intermediate voltage generating circuit having low output impeda

Details Intermediate voltage generating circuit having low output impeda Intermediate voltage generating circuit having low output impeda

1993-08-18

1994-11-29

Stephan, Steven L.

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

G05F 316, G05F 320

Patent

active

053693540

ABSTRACT:
By reducing output impedance of an intermediate voltage generating circuit used in a DRAM and the like, an output voltage quickly recovers to an intermediate voltage even in the case where the output voltage fluctuates heavily. The intermediate voltage generating circuit includes a first reference voltage generating circuit, a second reference voltage generating circuit, a first intermediate voltage output stage, and a second intermediate voltage output stage. An MOS transistor configuring a current mirror is provided with the first and second intermediate voltage output stages. The size of the MOS transistor of the second intermediate voltage output stage is larger than that of a transistor of the first intermediate voltage output stage. As a result, in response to a current flowing in either transistor of the first intermediate voltage output stage, a current having a value equal to or more than that of the current flowing in either transistor of the first intermediate voltage output stage is supplied to an output node, whereby the output impedance is reduced.

REFERENCES:
patent: 4442398 (1984-04-01), Bertails et al.
patent: 4788455 (1988-11-01), Mori et al.
patent: 5008609 (1991-04-01), Fukiage
"An Experimental 1.5-V 64-Mb DRAM", by Yoshinobu Nakagome, IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991, pp. 465-472.

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