Interlevel insulator for integrated circuit with implanted resis

Details Interlevel insulator for integrated circuit with implanted resis Interlevel insulator for integrated circuit with implanted resis

1981-07-20

1983-02-01

Roy, Upendra

Metal working

Method of mechanical manufacture

Assembling or joining

29571, 29591, 148 15, 148187, 357 54, 357 59, 357 91, H01L 2904, H01L 2978

Patent

active

043707980

ABSTRACT:
Integrated circuit resistor elements ideally suited for load devices in static MOS RAM cells are made in second-level polycrystalline silicon by an ion implant step compatible with a self-aligned N-channel silicon-gate process. The second-level polysilicon is insulated from first-level polysilicon by multi-layer insulation; first, a thermal oxide layer provides better edge breakdown characteristics for transistors, then secondly a layer of doped deposited oxide provides improved step coverage, and finally an undoped deposited oxide is used to prevent out diffusion from doped oxide to second level polysilicon which would change the characteristics of the resistors.

REFERENCES:
patent: 4110776 (1978-08-01), Rao et al.
patent: 4209716 (1980-06-01), Raymond, Jr.
patent: 4240097 (1980-12-01), Raymond, Jr.
patent: 4246692 (1981-01-01), Rao
patent: 4285001 (1981-08-01), Gerzberg et al.
patent: 4291328 (1981-09-01), Lien et al.
patent: 4297721 (1981-10-01), McKenny et al.

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