Interleaving method and apparatus

Details Interleaving method and apparatus Interleaving method and apparatus

1989-11-14

1992-08-04

Baker, Stephen M.

Excavating

365239, 377 26, 377 44, H03M 1322

Patent

active

051365880

ABSTRACT:
An interleaving method and apparatus suitable for burst error correction occurring in data transmission or reading of recording medium. In the interleaving method in which data to be transmitted is once written in a storing means and then read to be output in order different from a writing order, a plurality of counters for dividingly generating addresses of the storing means is used; and an operational relationship between the counters is changed between writing and reading of the storing means. ROMs for address translation can be omitted so that the number of gates is reduced very much. Thus, a reasonable interleaving apparatus suitable for LSI formation can be realized. In addition, since ROMs for address translation interposed between the counter and the storing means in the conventional apparatus are omitted, access time for the storing means can be shortened substantially.

REFERENCES:
patent: 4312070 (1982-01-01), Coombes et al.
patent: 4559625 (1985-12-01), Berlekamp et al.
Millman, J. et al., Microelectronics, McGraw-Hill, 1987, 333-334.
Zaks, R. et al., From Chips to Systems, Sybex, 1987, pp. 79-103.

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