Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2003-08-19
2004-12-28
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S118000
Reexamination Certificate
active
06836235
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an interleaving AD conversion type waveform digitizer. In particular, the present invention relates to a correction means for detecting a measurement error caused by a phase error of a sampling timing in interleaving AD conversion so as to correct the detected measurement error.
2. Related Art
An N-way interleaving AD conversion type waveform digitizer can increase an apparent sampling rate by using N A/D converters. This type of waveform digitizer is required to perform sampling at precise timings.
FIG. 7
shows a structure of a conventional digitizer
200
used in a testing apparatus for testing an electronic device. The digitizer
200
includes four A/D converters (ADCs)
110
, four clocks
112
, an interleaving unit
114
and a digital filter
116
. Each A/D converter
110
samples an analog signal output from the electronic device based on timings supplied to the associated clock
112
, thereby converting the analog signal to a digital signal. The interleaving unit
114
generates a data sequence obtained by arranging the digital signals converted by the four A/D converters
110
in a predetermined order. The digital filter
116
multiplies the data sequence generated by the interleaving unit
114
by a correction coefficient based on a predetermined impulse response function. The digital filter
116
removes a predetermined frequency component from the data sequence by the above multiplication. Then, the digital filter
116
outputs the data sequence multiplied by the correction coefficient to a determination unit of the testing apparatus. The determination unit determines based on the data sequence multiplied by the correction coefficient whether or not the electronic device is defective.
The four A/D converters have to be adjusted in phase in such a manner that the sampling timings thereof are arranged at constant phase intervals. In a case where the sampling timings of the respective A/D converters contain phase errors, the interleaving unit
114
and the digital filter
116
process the digital data output from the respective A/D converters while assuming that that digital data were obtained by sampling at constant intervals. As a result, the data sequence output from the digital filter
116
also contains an error with respect to the analog signal output from the electronic device. Therefore, the determination unit cannot precisely determine whether or not the electronic device under test is defective.
According to the conventional technique, the phase intervals between the sampling timings of the A/D converters were adjusted to be constant, as described above. On the other hand, the sampling characteristics of the A/D converter are affected by variation of parts in the A/D converter, the environmental temperature, the change with time, the fluctuation of supply voltage, thus affecting the sampling at constant intervals that is intended. Moreover, it was very difficult to supply clocks to a plurality of A/D converters so as to realize the sampling timings at constant phase intervals. These factors cause the fluctuation of the sampling timing from ideal sampling timing. This made it difficult to precisely reproduce the analog signal output from the electronic device. Thus, it became difficult to precisely determine whether or not the electronic device is defective.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide an AD conversion type digitizer and a semiconductor testing apparatus that can correct phase shifts of sampling between a plurality of A/D converters so as to precisely reproduce an analog signal. The above and other objects can be achieved by combinations described in the independent claims. The dependent claims define further advantageous and exemplary combinations of the present invention.
In order to achieve the above object, according to the first aspect of the present invention, a digitizer for converting an analog signal output from an electronic device to a digital signal, includes: an A/D converter operable to sequentially convert the analog signal output from the electronic device to a digital signal at predetermined time intervals; a digital filter operable to output a corrected signal obtained by multiplying the digital signal converted by the A/D converter by a correction coefficient; and a digital filter operable to output a corrected signal obtained by multiplying the digital signal converted by the A/D converter by a correction coefficient based on a phase error between an ideal sampling timing at which the A/D converter is to sample the analog signal and an actual timing at which the A/D converter sampled the analog signal.
The digital filter may have an impulse response function given thereto for calculating the correction coefficient, and the digital filter may output the corrected signal obtained by calculating convolution of the correction coefficient, that is a value of the impulse response function corresponding to a timing away from the ideal sampling timing by the phase error, and values of the digital signal.
According to the second aspect of the present invention, a digitizer for converting an analog signal output from an electronic device to a digital signal, includes: N A/D converters operable to convert the analog signal output from the electronic device to digital signals at different sampling timings by turns, N being an integer equal to or larger than 2; and N digital filters operable to output corrected signals, each of the corrected signals being obtained by multiplying one of the digital signals output from an associated one of the N A/D converters by a correction coefficient based on a phase error between an ideal sampling timing at which the associated A/D converter is to sample the analog signal and an actual sampling timing at which the associated A/D converter sampled the analog signal.
Each of the N digital filters may include a memory in which an impulse response function for calculating the correction coefficient is stored, and the N digital filters may output the corrected signals each obtained by calculating convolution of the correction coefficient, that is a value of the impulse response function corresponding to a timing away from the ideal sampling timing by the phase error of the associated A/D converter, and values of the digital signal converted by the associated A/D converter. In addition, the memory may store the impulse response function based on gain characteristics of the associated A/D converter. Moreover, the memory may store the impulse response function based on frequency characteristics of the associated A/D converter.
Each of the N digital filters may include a memory for storing as the correction coefficient a value of an impulse response function of the digital filter at the actual sampling timing of the associated A/D converter, and the N digital filters may output the corrected signals each obtained by calculation of convolution of values of the digital signal converted by the associated A/D converter and the correction coefficient. In addition, the memory may store the correction coefficient based on gain characteristics of the associated A/D converter. Moreover, the memory may store the correction coefficient based on frequency characteristics of the associated A/D converter.
The digitizer may further include an interleaving unit operable to generate a data sequence obtained by arranging the corrected signals respectively output from the N digital filters in a predetermined order. Moreover, the digitizer may further include a decimation data generation unit operable to calculate a sum of the corrected signals respectively output from the plurality of digital filers to generate decimation data, wherein each of the N digital filters multiplies the digital signal output from the associated A/D converter by the correction coefficient based on: a phase error between the ideal sampling timing at which the associated A/D converter is to sample the analog signal and the ac
Advantest Corporation
Osha & May L.L.P.
Williams Howard L.
LandOfFree
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