Computer graphics processing and selective visual display system – Computer graphic processing system – Integrated circuit
Patent
1996-12-31
1999-02-02
Evans, Arthur G.
Computer graphics processing and selective visual display system
Computer graphic processing system
Integrated circuit
345186, G06K 1500
Patent
active
058671790
ABSTRACT:
Interleaved data are converted to a planar format by an algorithm that follows map cycles throughout a frame buffer. Such map cycles result from iterating a function that maps planar addresses to CMYK addresses. There are three phases to the algorithm: In phase I, a 1-Cycle is processed and ! are saved. In phase II, all indices between 1 and MAX.sub.-- HIT are visited, skipping any indices that have already been in a cycle. As each cycle is converted, any hits to indices between 1 and MAX.sub.-- HIT are are quickly skipped. Phase III is skipped unless there are still some copies left to process. In phase III, there is no more space for recording every hit individually. When looking for new cycles, only indices that are not multiples of anything in the 1-Cycle are considered. Also, once the remaining number of uncycled bytes drops below the 1-Cycle's length, all remaining cycles are known to belong to factors of Q, and the search is narrowed to those values only. When an index i is found that cannot be rejected for one of these reasons, the algorithm begins processing the indices cycle, but if the algorithm ever ends up at an index less than i, then this i-cycle has already been processed. In that case, the i-cycle is restored to its previous state by copying in the reverse direction, and the algorithm skips to the next candidate for i.
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patent: 5671440 (1997-09-01), Curry
Electronics For Imaging, Inc.
Evans Arthur G.
Glenn Michael A.
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