Electric power conversion systems – Current conversion – Having plural converters for single conversion
Reexamination Certificate
2002-02-28
2004-02-10
Han, Jessica (Department: 2838)
Electric power conversion systems
Current conversion
Having plural converters for single conversion
C323S272000
Reexamination Certificate
active
06690589
ABSTRACT:
TECHNICAL FIELD
The present invention relates in general to power factor correction (PFC) circuitry and, more specifically, how to reduce cost and improve converter specifications when interleaving PFCs.
BACKGROUND
Regulations in various countries have mandated the need for a high power factor in AC/DC converters and other loads that may affect the line power factor. As known in the art, a high power factor condition exists when the alternating current (AC) load is resistive, the current and voltage are in phase and the power factor is 100%. In the industry, one of many standard approaches to obtain a higher power factor condition is to control converter input current using a boost topology. Many basic details relative power factor correction may be found in various textbooks, such as Chapter 15 of “Switching Power Supply Design” Second Edition published by McGraw Hill and Authored by Abraham I Pressman.
One typical control integrated circuit (IC) utilized in the industry is a standardized chip designated as a 2818, a version of which is available from Texas Instruments, Inc. (TI) as a UCC2818. Application notes, entitled “BiCMOS POWER FACTOR PREREGULATOR,” are available from TI for a family of ICs including the 2818 IC. The 2818 chip implements a technique known as average current mode control. As the name implies, this technique controls the average input current.
Although the average input current may be sensed with a single resistor placed in the return to the rectified source, a considerable amount of power is dissipated (and wasted) in this approach. Thus, most average current PFC circuits use two current transformers (CTs) for sensing, summing and averaging the current in both a switch leg and diode or non-switch leg of the PFC circuit. CTs, however, add size and cost to a PFC circuit.
One approach to reducing size and weight is to use a single CT in the switch leg of the PFC circuit to detect only the peak switch current. In the industry, this approach is referred to as current mode control (CMC). More detail on an IC that can be used to provide such a peak current controller may be found in an application note from TI, entitled “BiCMOS Low Power Current Mode PWM Controller.” It is well known in the industry that the CMC approach is unstable when the switch duty cycle exceeds 50%. The CMC can be made stable by implementing a technique known as slope compensation. This technique is implemented by adding a slope to the current ramp, as set forth in a July 1996 IEEE (APEC) article by C. Canesin, entitled “Analysis and Design of Constant Frequency Peak Current Controlled High Power Factor Rectifier with Slope Compensation” on pp 807-813. A difficulty of such an approach is that CMC does not perform as well as average current mode in PFC applications. More detail on this situation may be obtained from a paper by R. Redl, entitled “Reducing Distortion in Peak-Current-Controlled Boost Power-Factor Correctors,” IEEE (APEC) 1994, pp. 576-583.
It is further known in the art that interleaving controllers (paralleling) allows the use of smaller components or, alternatively, components that are not available with high current ratings. Further, electronic emission interference (emi) signals are reduced when using interleaved controllers due to the lower amount of ripple. However, current sharing is not guaranteed when using two average current controllers, as set forth in a paper by L. Balogh, entitled “Power Factor Correction with Interleaved Boost Converters in Continuous-Inductor-Current Mode,” IEEE (APEC) 1993, pp. 168-174. When the current is not equally shared between multiple units, the different peak currents can increase the emi and increase design size and cost over what would occur in an optimized interleaved unit. The size and cost increase is generally due to a safety factor being built into the controller design to accommodate unbalanced currents in the interleaved converters. Thus, interleaved PFC units typically are designed using CMC with slope compensation as set forth in a paper by R. Giral, entitled “Interleaved Converters Operation Based on CMC” IEEE (APEC), pp. 643-652.
It has been found that average current mode PFC controllers obtain better power factor than do peak (CMC) controllers. The measurements used in the industry are total harmonic distortion and power factor. The total harmonic distortion in an average current mode PFC is typically improved over a comparable CMC unit.
It would thus be desirable to be able to use interleaved controllers that equally share the load current for low emi and allow the use of low current, lower cost components and lower weight components while obtaining the lower total harmonic distortion available from an average current mode PFC controller.
SUMMARY OF THE INVENTION
The present invention comprises providing peak or CMC control to a master and one or more slave controllers from a switch leg control transformer (CT). Thus, the input current is substantially equally divided between controllers. A further or extra CT, situated in the non-switched leg of only the master controller, is used in combination with the switch leg CT whereby the average current may be determined and used in a single average current controller. The difference between a reference current logically obtained from the average current controller and the actual current commanded by the CMC controller is compared to create a switch leg control signal that may be used by the slave CMC controllers to obtain high power factor.
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Pressman, Abraham I.; “Power Factor, Power Factor Correction,” Chapter 15,Switching Power Supply Design, Second Edition, McGraw Hill, pp. 533-561, (no date).
Miwa, Brett A et al.; Abstract of“High Efficiency Power Factor Correction Using Interleaving Techniques”;IEEE(0-7803-0485-3/92); Mar. 1992; pp. 557-568.
Balogh, Laszlo et al.; Abstract of “Power-Factor Correction with Interleaved Boost Converters in Continuous-Inductor-Current Mode”;IEEE(0-7803-0982-0/93); 1993; pp. 168-174, (no month).
Redl, Richard et al.; Abstract of “Reducing Distoration in Peak-Current-Controlled Boost Power-Factor Correctors”;IEEE(0-7803-1456-5/94); May 1994; pp. 576-583.
Canesin, Carlos A. et al.; Abstract of “Analysis and Design of Constant-Frequency Peak-Current-Controlled High-Power-Factor Boost Rectifier with Slope Compensation”;IEEE(0-7803-3044-7/96); Jul. 1996; pp. 807-813.
Giral, Roberto et al.; Abstract of “Interleaved Converters Operation Based on CMC”;IEEE S(0885-8993/99); vol. 14; No. 4; Jul. 1999; pp. 643-652.
Product data sheet of Unitrode Products from Texas Instruments for a BiCMOS Power Factor Preregulator; product Nos. UCC2817, UCC2818, UCC3817, UCC3818; Feb. 2000—revised Apr. 2001; pp. 1-17; Dallas, Texas.
Product data sheet of Texas Instruments for a BiCMOS Low-Power Current-Mode PWM Controller; product Nos. UCC28C40-UCC28C45 and UCC38C40-UCC38C40-UCC38C45; Aug. 2001; pp. 1-18; Dallas, Texas.
Barnett Rick L.
Blair Barry Olen
Fasullo Gregory H.
Marabell Donald
Marsh Andrew
Carr LLP
Han Jessica
Valere Power, Inc.
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