Interlacing the paths after a conditional branch like instructio

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364DIG1, 3642318, 3642614, 3642615, 364263, 3642631, G06F 938

Patent

active

051650258

ABSTRACT:
By interlacing the two program paths after the test part of a conditional branch, both program paths are available (with minimal delay) from a simple instruction fetch mechanism. Further, the interlacing of program paths continues only until one path ends with an unconditional branch or return.

REFERENCES:
patent: 4373180 (1983-02-01), Linde
patent: 4439827 (1984-03-01), Wilkes
patent: 4777594 (1988-10-01), Jones et al.
patent: 4881194 (1989-11-01), Sprague et al.
Lilja, "Reducing the Branch Penalty in Pipelined Processors", IEEE Computer, vol. 21, No. 7, Jul. 1988 pp. 47-55.

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