Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Patent
1993-05-05
1995-09-26
Picard, Leo P.
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
174260, 361774, 361777, H05K 100
Patent
active
054535832
ABSTRACT:
A technique for reducing thermally-induced mechanical stresses on bond pads in semiconductor device assemblies is accomplished by grouping the bond pads into a relatively small (compared to the total area of the die) sub-area within an interior area (generally away from the periphery) of the die. By keeping the bond pad layout small (tightly grouped, or oriented along a single row, or axis), differential thermally induced displacements between the bond pads are minimized, or are controlled in one dimension. Further, the bond pads may be disposed in a small area near the center of thermal expansion (centroid) of the die or near a heat-producing circuit element to minimize absolute thermal displacements of individual bond pads from the centroid or the circuit element. Overlapping sub-area patterns may be used, and grouped bond pads may be used in conjunction with (including overlapping of) traditional die-periphery located bond pads. Other aspects involve disposing the bond pads into an elongated pattern to minimize thermal displacement primarily in one direction, and orienting a lead frame or the like to accommodate any thermal migration of the bond pads in a controlled direction.
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Pasch Nicholas F.
Rostoker Michael D.
Zelayeta Joe
Figlin Cheryl R.
LSI Logic Corporation
Picard Leo P.
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