Interference immune digital modulation receiver

Pulse or digital communications – Spread spectrum – Direct sequence

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375 39, 455305, H04B 112

Patent

active

048233617

ABSTRACT:
A 2.sup.n -level demodulated signal is resolved into 2.sup.(n+m) equal intervals by an (n+m)-bit A/D converter (12) and an (n+m)th significant bit is produced from the LSB output of the converter as a representation of an interfering signal contained in the demodulated signal, where m is equal to or greater than unity. A subtractor (5p, 5q; 32p, 32q) cancels the interfering signal with a cancelling signal supplied from a feedback control circuit (9, 11, 7; 16-19; 30-31) which derives it by controlling the amplitude of the (n+m)th significant bit in accordance with the amount of the interfering signal still present in the output of the subtractor.

REFERENCES:
patent: 4380082 (1983-04-01), Namiki
patent: 4479258 (1984-10-01), Namiki
patent: 4534026 (1985-08-01), Martinez et al.
patent: 4631734 (1986-12-01), Foschini
patent: 4644564 (1977-02-01), Dolivo et al.

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