Interference canceling method and apparatus of a multi-mode...

Multiplex communications – Communication over free space – Combining or distributing information via code word channels...

Reexamination Certificate

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C375S148000, C375S346000

Reexamination Certificate

active

06473415

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an interference canceling method and apparatus of a multi-mode subtraction type in asynchronous multipath channels of code division multiple access (CDMA) system, and more particularly to the interference canceling method and apparatus of a multi-mode subtraction type to increase the performance and capacity of the CDMA system by reducing the interference produced by a multiple access process in CDMA system with the asynchronous multipath channels.
2. Description of the Related Art
The performance of CDMA systems is limited dominantly by interference, which results from the other users' signal involved in the system. These limitations are not inherent to CDMA, but result from using the conventional single-user detector. The CDMA system using the conventional single-user detector is not optimal in the presence of the multiple access interference (MAI) and the performance degradation ultimately results in system capacity reduction. Furthermore, the received signal powers at a base station may not be equal due to the user location or channel variation and, thus, strict power control should be employed with a single-user receiver.
There have been great efforts to mitigate the MAI and increase the capacity of CDMA system through multi-user detectors. Optimal multi-user detector shows excellent performance, but it is too complex to be implemented. To reduce the implementation complexity, therefore, most of the research has focused on finding suboptimal multi-user detectors. Especially, to suppress the MAI of reverse links in a base station, subtractive interference cancellation (IC) techniques such as the serial (successive) interference cancellation (SIC) method and the multistage parallel interference cancellation (PIC) method have been introduced. The prior art of the SIC method has been described by, for example, “Analysis of a Simple Successive Interference Cancellation Scheme in a DS/CDMA System”, by P. Patel and J. Holtzman, IEEE J. on Selected Areas in Communications, Vol. 12, No. 5, pp.796-807, June 1994. The prior art of the PIC method has been described by, for example, “A Spread-Spectrum Multi-Access System with a Cascade of Co-channel Interference Cancellers for Multipath Fading Channels”, by Y. C. Yoon, R. Kohno, and H. Imai, IEEE Second International Symposium on Spread Spectrum Techniques and Applications (ISSSTA'92), pp.87-90, Nov. 29-Dec. 2, 1992.
The basic concept of subtractive IC is that a user signal can be regenerated deterministically at receiver, and by canceling the regenerated signal from the original received signal so that the receivers of the remaining users can detect the transmitted data with a modified (interference canceled) receive signal.
The SIC method provides a simple successive solution by canceling a user's interference in order of received power at a successive cancellation. The first problem in the SIC method is that the detectors once selected make no more contribution again for subsequent operation. Consider a detector with the strongest power. This detector is selected first, and the corresponding user's signal is regenerated with the corrupted knowledge of the decision variable and channel parameters obtained from the received signal containing considerable amount MAI. Thus, the noise resulting from this imperfect regeneration affects the subsequent cancellation operation. The second problem can be introduced from practical implementation perspective. The SIC method requires a high speed hardware in order to process the total number of users in service within a bit interval. If a sufficiently high speed hardware is not available, an alternative is to limit the number of cancellations at the expense of performance degradation.
In the multistage PIC method, a form of parallel cancellation, at each user's detector input all the other users' signals are canceled every stage instead of successive cancellation. That is, for regenerating the other user's signal the estimates at a current stage are obtained based on the values at the previous stage, and this operation may be repeated for an arbitrary number of stages. The limit on the performance of PIC results from canceling the interference caused by all the other users without considering the reliability of each user signal. When the powers of the received signals are widely spread, as in the case of multipath fading channels, the performance of the PIC is inferior to that of the SIC since the detectors for the weak users participate in the cancellation with the corrupted estimates including channel parameters and bit decision. In addition, although the multistage PIC method does not require a high speed hardware, it require a multistage (cascade) of the same hardware set, which increases hardware complexity.
SUMMARY OF THE INVENTION
Accordingly, for overcoming the problems, it is an object of the present invention to provide the interference canceling method and the apparatus of a multimode subtraction type in asynchronous multipath channels of CDMA system which can increase the performance and capacity of the CDMA system by reducing the interference produced by a multiple access process in CDMA system with the asynchronous multipath channels.
The performance of subtractive ICs depends mainly on the accuracy of the information for regenerating MAI, such as the bit decision and the estimates of the channel parameters. However this is not guaranteed in low signal to noise and interference ratio (SNIR) situations. In practical mobile communication environments such as multipath fading channels, the reliability of interference estimate of each user (or path) is unequal and time-varying. The reliability of interference estimate of a user (or a path) with high power is obviously higher than that with low power. In the present invention, the detectors with low SNIR input signals do not participate in earlier cancellations. This is, the detectors not involved in earlier cancellations are to be included in later cancellations when sufficient SINR is guaranteed after canceling the signals with high power in earlier cancellations.
In the present invention, the bit decision and the estimates of the channel parameters for all detectors are updated with new (more cleaned and enhanced) input to detectors at every cancellation. In the present invention, unlike the SIC method, the selected detectors keep participating in cancellation processing with new updated estimates and update their bit decisions based on the input after the current cancellation at every step while the selected detector performs the ordinary cancellation as in the SIC method. It is important to note that this operation adds no processing time in a cancellation that restricts the number of iteration.
Unlike the PIC method, the present invention prevents the detectors whose input signals are too week to improve the cancellation performance from participating in cancellation by the ranking of each user-received signal power. This is, the present invention cancels the MAI with considering the reliability of each user signal based on the received signal power. In the present invention, the detectors selected at the previous cancellations as well as the detectors selected at the current cancellation only participate in the cancellation. As the number of cancellation increases, the number of detectors having been selected up to the current cancellation increases.
The present invention supports the multi-mode IC method. The present invention can select the proper IC method by considering the total number of users in service, the hardware speed to implement the present method and the power spread of received signals. Also, the present invention repeats the selected IC process recursively with a stage of hardware, which can reduce the hardware complexity required for the multistage PIC method.
In most realistic applications, the reverse links, for which the subtractive IC methods are implemented, are chip-asynchronous and us

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