Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
2007-06-05
2007-06-05
Sparks, Donald (Department: 2181)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C712S225000, C712S029000, C710S033000, C710S036000
Reexamination Certificate
active
10054577
ABSTRACT:
The present invention relates generally to interfacing a processor with at least one coprocessor. One embodiment relates to a processor having a set of broadcast specifiers which it uses to selectively broadcast an operand that is being written to a register within the processor to a coprocessor communication bus. Each broadcast specifier may therefore include a broadcast indicator corresponding to each general purpose register of the processor. An alternate embodiment may also use the concept of broadcast regions where each broadcast region may have a corresponding broadcast specifier where one broadcast specifier may correspond to multiple broadcast regions. Alternatively, in one embodiment, the processor may use broadcast regions independent of the broadcast specifiers where the coprocessor is able to alter its functionality in response to the current broadcast region. In one embodiment, the processor may provide a region specifier via the coprocessor communication bus to indicate the current broadcast region.
REFERENCES:
patent: 5117350 (1992-05-01), Parrish et al.
patent: 5485624 (1996-01-01), Steinmetz et al.
patent: 5923893 (1999-07-01), Moyer et al.
patent: 5983338 (1999-11-01), Moyer et al.
patent: 6047122 (2000-04-01), Spiller
patent: 6138185 (2000-10-01), Nelson et al.
patent: 6223277 (2001-04-01), Karguth
patent: 0 901 071 (1999-03-01), None
Borkar et al. iWarp: An Integrated Solution to High-Speed Parallel Computing. 1988, Proceedings of the 1988 ACM/IEEE conference on Supercomputing.
Borkar et al. Supporting Systolic and Memory Communication in iWarp. 1990. ACM Sigarch Computer Architecture News, Proceedings of the 17th Annual International Symposium on Computer Architecture.
Gates et al., “DynaMICs: An Automated and Independent Software-Fault Detection Approach,”High Assurance Systems Engineering, 1999 Proceedings, 4th IEEE International Symposium on Washington, DC USA, Nov. 17-19, 1999, Los Alamitos, CA, USA,IEEE Comput. Soc., Nov. 17, 1999, pp. 11-19.
PCT/US02/34955 PCT International Search Report mailed Feb. 27, 2003.
Chiu Joanna G.
Freescale Semiconductor Inc.
Meonske Tonia L
Sparks Donald
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