Interface system between a host computer and a peripheral proces

Details Interface system between a host computer and a peripheral proces Interface system between a host computer and a peripheral proces

1985-07-29

1989-01-17

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 1312, G06F 1200, G06F 1516

Patent

active

047991500

ABSTRACT:
An interface circuit controls the unloading of a host computer system onto a peripheral processor unit. The interface circuit has a normal mode of operation which is independent of the host computer. During the normal mode, the peripheral unit processes data previously supplied by the host computer. The interface device has a trap I/O mode of operation in which information flows between the host computer and the peripheral unit. The trap I/O mode is initiated by a range of instruction addresses from the peripheral unit. In one embodiment, any instruction address less than a predetermined critical value initiates the trap I/O mode. The host computer acknowledges the trap I/O mode, and executes the instruction at the host level to advance the peripheral process. In the trap I/O mode, the peripheral processor operates simultaneous with and independently of the peripheral unit to permit unloading of the host computer. In addition, the peripheral unit has a faster clock and more operating bits than the host system; and can accelerate the processing of the host data.

REFERENCES:
patent: 4247891 (1981-01-01), Flynn
patent: 4375665 (1983-03-01), Schmidt
patent: 4443846 (1984-04-01), Adcock
patent: 4466098 (1984-08-01), Southard
patent: 4542456 (1985-09-01), Hill
patent: 4554632 (1985-11-01), Nygaard
patent: 4692897 (1982-09-01), Crabbe
patent: 4695945 (1987-09-01), Irwin
patent: 4703420 (1987-10-01), Irwin
patent: 4727480 (1988-02-01), Albright et al.
"High-Order Zero Suppression", by Deskevich, IBM Technical Disclosure Bulletin, vol. 9, No. 6, Nov. 1966, pp. 609-610.
Digital Electronics, by Taub & Schilling, .COPYRGT.1977, pp. 430-433.

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