Interface for data communication systems using serial biphase da

Details Interface for data communication systems using serial biphase da Interface for data communication systems using serial biphase da

1981-05-11

1983-11-22

Heckler, Thomas M.

Boots, shoes, and leggings

307475, G06F 304

Patent

active

044173202

ABSTRACT:
An interface for biphase data communication systems utilizing serial transmissions between a central control unit and a peripheral device. A ROM-latch network serving as a sequencer is utilized as a bi-directional biphase serial/TTL parallel translator. In the receiver mode the ROM-latch will step through a specific operational sequence for detecting an appropriate header and controlling a TTL parallel translation of the serial biphase data. In the transmitter mode the ROM-latch is used to reconstruct the header sequence prior to retranslating and transmitting the TTL parallel data in serial biphase format. A receiver clock generator circuit is provided for generating clock pulses for the ROM-latch in synchronism with the incoming biphase transmissions. A transmitter level converter defines the waveforms for the biphase data transmitted from the interface and is designed to provide a predistortion pulse at each voltage level transition.

REFERENCES:
patent: 3830962 (1974-08-01), Mailloux
patent: 4048673 (1977-09-01), Hendrie et al.
patent: 4168469 (1979-09-01), Parikh et al.

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