Pulse or digital communications – Repeaters – Testing
Patent
1982-12-23
1985-06-11
Griffin, Robert L.
Pulse or digital communications
Repeaters
Testing
375 81, 375120, H04L 702
Patent
active
045233225
ABSTRACT:
An interface device for synchronizing an internally clocked modem and data terminal equipment (DTE) provided with their own clock circuits, each of said own terminal clock circuit providing an external clock signal (RC Ext). The interface includes a PLO generating a recovered clock signal (XCO). At a moment defined by a request to send signal the phases of XCO and RC Ext are compared with each other and a switched clock signal SWC oscillating at a fast rate for a time interval corresponding to the phase delay between RC Ext and XCO and subsequently oscillating at a slow rate, is generated. The signal SWC is used for shifting RC Ext and terminal provided data RD Ext into shift registers respectively. The shifted RC Ext is used for controlling the adjustment of the interface PLO.
REFERENCES:
patent: 3778549 (1973-12-01), Schroder et al.
patent: 3940558 (1976-02-01), Gabbard et al.
patent: 4229816 (1980-10-01), Breidenstein et al.
patent: 4253181 (1981-02-01), Watten
patent: 4270211 (1981-05-01), Schichte
patent: 4309662 (1982-01-01), Baudoux
Davies D. W. et al., "Communications Networks for Computers", Wiley, 1973, pp. 167-168.
G. Epenoy et al., "Elastic Buffer with Automatic Shift Correction Capability", IBM Tech. Disclosure Bulletin, vol. 22, No. 10, Mar. 1980, pp. 4597-4599.
Chin Stephen
Duffield Edward H.
Griffin Robert L.
International Business Machines - Corporation
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