Multiplex communications – Wide area network – Packet switching
Patent
1994-11-15
1996-09-10
Kizou, Hassan
Multiplex communications
Wide area network
Packet switching
370 601, 370 942, 375356, 375373, H04J 306, H04L 1256
Patent
active
055552617
ABSTRACT:
An internal timing information producing portion produces internal timing information IRTS1 to IRTS4 which is the timing information on a data reception clock by using a network clock C.sub.N and the data reception clock C.sub.RU. A calculator calculates the difference between the internal timing information IRTS1 to IRTS4 and the transmission timing information RRTS1 to RRTS4 contained in a received cell, and a data reception clock producing portion adjusts the timing of the data reception clock C.sub.RU so that the difference is zero and outputs the adjusted timing. An ATM cell decomposing portion outputs the user data D.sub.RU in synchronism with the data reception clock C.sub.RU which is input from the data reception clock producing portion.
REFERENCES:
patent: 4890303 (1989-12-01), Bader
patent: 4961188 (1990-10-01), Lou
patent: 5204882 (1993-04-01), Chao et al.
patent: 5255291 (1993-10-01), Holden et al.
B-ISDN ATM Adaption layer (AAL) specification ITU-T I.363.
R. C. Lau, et al., "Synchronous Techniques for Timing Recovery in BISDN", Globecom '92 Communnication for Global Users, IEEE Global Telecommunications Conference, Dec. 1992, pp. 814-820.
Iketani Youzou
Kakuma Satoshi
Nakayama Mikio
Okuyama Yuzo
Tachibana Tetsuo
Fujitsu Limited
Kizou Hassan
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