Interface circuit provided between a compound semiconductor logi

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307450, 307443, H03K 190175, H03K 1920

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active

051592088

ABSTRACT:
An interface circuit provided between a compound semiconductor logic circuit and a bipolar transistor circuit includes an input buffer part for receiving an input signal from the GaAs logic circuit and for outputting a buffered input signal, and an output driver circuit for generating a drive signal from the buffered input signal. The interface circuit also includes an output transistor having a gate connectable to receive the drive signal, a first terminal connectable to receive a first power supply voltage, and a second terminal, and an output terminal connected to the second terminal of the output transistor and the bipolar transistor circuit. Further, the interface circuit includes an output level adjustment circuit which has a first Schottky barrier transistor having a gate, a first terminal connected to the gate of the Schottky barrier transistor and the gate of the output transistor, and a second terminal and which generates a constant voltage applied to the second terminal of the Schottky barrier transistor.

REFERENCES:
patent: 4631426 (1986-12-01), Nelson et al.
patent: 4701643 (1987-10-01), Laude et al.
patent: 4743782 (1988-05-01), Nelson et al.
patent: 4912745 (1990-03-01), Fitzpatrick et al.
Patent Abstracts of Japan, vol. 11, #20 (E-472)[2467], Dec. 20, 1987 & JP-A-61 192 123 (Fujitsu Ltd.) 26/8/86 FIG. p.(E-472)[2467].
Patent Abstracts of Japan, vol. 11, #217 (E-523)[2664], Jul. 14, 1987 & JP-A-62 36 918 (Mitsubishi Electric) 17/2/87.

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