Boots – shoes – and leggings
Patent
1994-10-25
1997-01-07
Lee, Thomas C.
Boots, shoes, and leggings
395500, 3642285, 3642383, 3642399, G06F 1502
Patent
active
055926827
ABSTRACT:
A high performance Local Bus Peripheral Interface (LBPI) for a computer local bus and its high performance peripheral interface(s), using a pipelined architecture to increase the use of the available data transfer bandwidth. To accomplish the above, the LBPI, which is coupled between the computer local bus and the peripheral interface(s), is provided a pipelined architecture which includes a Read Ahead Buffer, a Read Ahead Counter, a Data Out Latch, and a Controlling State Machine with a Configuration Register. In one embodiment, the LBPI can be selectably configured to couple on the host side to either a VL bus or PCI bus. Efficiency of Read-Ahead operations is further enhanced by maintaining a countdown of the number of words of a data sector already transferred and/or "snooping" the peripheral device commands from the computer to intelligently predict the occurrence of subsequent read data transfers commands. The Controlling State Machine also "snoops" the peripheral device commands to maintain its record of the operating parameters of the peripheral devices and also keeps track of which of the devices is currently active. In one embodiment, the LBPI supports DMA and PIO data transfers on the peripheral side. In another embodiment, the LBPI translates memory data transfers into IO data transfers to improve efficiency of IO data transfers. A DMA Timeout Counter is used during DMA mode data transfer operations to prevent the system from indefinitely waiting for an appropriate DMA Request Signal from a selected peripheral. During a DMA mode data transfer operation, forced interrupts may be generated and transmitted to the host in order to emulate a PIO mode data transfer operation. During a DMA mode data transfer operation, an imposed status or "Fake 3F6" register is utilized to transmit status information to the host system.
REFERENCES:
patent: 3673576 (1972-06-01), Donaldson, Jr.
patent: 4004283 (1977-01-01), Bennett et al.
patent: 4145751 (1979-03-01), Carlow et al.
patent: 4258418 (1981-03-01), Heath
patent: 4396995 (1983-08-01), Grau
patent: 4443846 (1984-04-01), Adcock
patent: 4447878 (1984-05-01), Kinnie et al.
patent: 4453229 (1984-06-01), Shaire
patent: 4490784 (1984-12-01), Ives et al.
patent: 4683534 (1987-07-01), Tietjen et al.
patent: 4716527 (1987-12-01), Graciotti
patent: 4779190 (1988-10-01), O'Dell et al.
patent: 4800483 (1989-01-01), Yamamoto et al.
patent: 4831514 (1989-05-01), Turlakov et al.
patent: 4831523 (1989-05-01), Lewis et al.
patent: 4860193 (1989-08-01), Bentley et al.
patent: 4860244 (1989-08-01), Bruckert et al.
patent: 4935868 (1990-06-01), Dulac
patent: 4935894 (1990-06-01), Ternes et al.
patent: 4958271 (1990-09-01), Yoshida et al.
patent: 4972364 (1990-11-01), Barrett et al.
patent: 4979102 (1990-12-01), Tokuume
patent: 4991217 (1991-02-01), Garrett et al.
patent: 5014236 (1991-05-01), Pogorzelski et al.
patent: 5056060 (1991-10-01), Fitch et al.
patent: 5073969 (1991-12-01), Shoemaker
patent: 5079693 (1992-01-01), Miller
patent: 5091850 (1992-02-01), Culley
patent: 5111423 (1992-05-01), Kopec, Jr. et al.
patent: 5113369 (1992-05-01), Kinoshita
patent: 5117486 (1992-05-01), Clark et al.
patent: 5121479 (1992-06-01), O'Brien
patent: 5136692 (1992-08-01), Barrett et al.
patent: 5150465 (1992-09-01), Bush et al.
patent: 5191657 (1993-03-01), Ludwig et al.
patent: 5220651 (1993-06-01), Larson
patent: 5224213 (1993-06-01), Dieffenderfer et al.
patent: 5239636 (1993-08-01), Dujari et al.
patent: 5239651 (1993-08-01), Sodos
patent: 5241631 (1993-08-01), Smith et al.
patent: 5280588 (1994-01-01), D'Ambrose et al.
patent: 5287460 (1994-02-01), Olsen et al.
patent: 5293622 (1994-03-01), Nicholson et al.
patent: 5293623 (1994-03-01), Froniewski et al.
patent: 5307320 (1994-04-01), Farrer et al.
patent: 5309568 (1994-05-01), Ghosh et al.
patent: 5317715 (1994-05-01), Johnson et al.
patent: 5335329 (1994-08-01), Cox et al.
patent: 5379382 (1995-01-01), Work et al.
patent: 5379384 (1995-01-01), Solomon
patent: 5388224 (1995-02-01), Maskas
patent: 5440698 (1995-08-01), Sindhu
patent: 5444852 (1995-08-01), Nakabayashi
"High-Performance Graphics", by McNierney, Ed, PC Tech Journal, V5, N7, p. 56(8), Jul. 1987.
"Mapping PC Address Space", by Hansen, Augie, PC Tech Journal, V5, N3, p. 102(9), Mar. 1987.
"Bidirectional Serial Computer Interface", by Gerald Cohn, Electronics Australia, Apr. 1981.
"Custom-Tailored Graphics", by McNierney, Ed, PC Tech Journal, V5, N7, p. 68(6), Jul. 1987.
"Hands-On Experience Paves the Way for Future MCA Designs", by Darbonne et al, EDN, V34, N23, p. 233(14), Nov. 1989.
"PC-At Compatibility Comes to Multibus II Systems", by Redelfs et al, ESD, V18, N12, p. 30(5), Dec. 1988.
"Control Two Steppers With One Microprocessor", by Viallet, Fabien, Electronic Design, V36, N24, p. 101(4), Oct. 1988.
Appian's News Release dated Nov. 8, 1991 on P928, "Appian Announces P928 FAST Local Bus Peripheral Interface Device".
Appian's VGA and IDE Benchmarks on P928 dated Nov., 1991.
Appian's BIOS Application Note by R. Kalish dated Dec. 17, 1991 on P928.
Appian's BIOS Application Note by Richard Kalish dated Jan. 2, 1992 on P928.
Appian's Fast Peripheral Interface Data Sheet dated Jan., 1992 on P928.
Appian's Fast Peripheral Interface Design Design Manual dated Apr., 1992 on P928.
Appian's Local Bus IDE Disk Interface Advanced Information Datasheet dated Jun., 1992 on AD12.
Appian's Fast Peripheral Interface Product Brief dated Jul., 1992 on P928.
Appian's Fast Peripheral Interface Design Manual Addendum dated Jul., 1992 on P928.
Appian's Fast Peripheral Interface Design Manual dated Aug., 1992 (Revision 2) on P928.
Appian's Local-bus IDE Interface Preliminary Information Packet dated Sep., 1992m on AD12.
Appian's News Release dated Sep. 14, 1992 on the AD12 Local Bus IDE Disk Interface Chip.
Appian's Applications Update #1 dated Oct. 6, 1992 on AD12.
Appian's Local Bus Peripheral Interface Product Brief dated Nov., 1992 on P928.
Appian's Engineering Sample Notice dated Nov. 23, 1992 on AD12.
Chejlava, Jr. Edward J.
Cline Leslie E.
Curt Kenneth C.
Cirrus Logic Inc.
Heid David W.
Lee Thomas C.
Meky Moustafa Mohamed
Wallace T. Lester
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