Interface circuit and binary data transfer method

Coded data generation or conversion – Digital code to digital code converters – Adaptive coding

Reexamination Certificate

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C341S055000

Reexamination Certificate

active

07439879

ABSTRACT:
An interface circuit capable of controlling a noise margin and a time margin for producing an output a binary data is realized. The circuit comprises a detecting unit for detecting a transition state of logic levels in received binary data corresponding to preceding two clock signals, an output signal producing unit for producing an output binary data based on the received binary data by using a reference voltage and by latching the binary data using the clock signal, a reference voltage control unit for controlling the reference voltage, and a clock phase control unit for controlling a phase of the clock signal. The noise margin can be controlled by changing the reference voltage in accordance with the detected transition state, and the time margin can be controlled by changing the clock phase in accordance with the detected transition state.

REFERENCES:
patent: 5517331 (1996-05-01), Murai et al.
patent: 5793722 (1998-08-01), Yamamuro
patent: 5856750 (1999-01-01), Kosecki
patent: 7180966 (2007-02-01), Vallet et al.
patent: 408237617 (1996-09-01), None
patent: 9-232923 (1997-09-01), None

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