Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2007-05-22
2007-05-22
Tra, Quan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S291000
Reexamination Certificate
active
10943141
ABSTRACT:
An interface circuit which outputs a clock signal and data to a data register that serially reads in the data synchronously with the clock signal, in response to a control signal changing from one level to the other level, for outputting the clock signal and the data. The interface circuit comprises a clock output circuit that, responding to the level of the clock signal when the control signal changes from the one level to the other level, outputs clocks of the clock signal that are the same in number as bits of the data to the data register.
REFERENCES:
patent: 5654988 (1997-08-01), Heyward et al.
patent: 5938746 (1999-08-01), Ozawa et al.
patent: 6215817 (2001-04-01), Kimura
patent: 6278755 (2001-08-01), Baba et al.
patent: 6888391 (2005-05-01), Saita
patent: 2003/0001633 (2003-01-01), Gresham
patent: 2003/0011558 (2003-01-01), Motegi et al.
patent: 2003/0042956 (2003-03-01), Araki
patent: 2003/0081707 (2003-05-01), Takeuchi et al.
patent: 0 420 579 (1991-04-01), None
patent: 0 589 499 (1999-04-01), None
patent: 61-072439 (1986-04-01), None
patent: 61-218246 (1986-09-01), None
patent: 03-122895 (1991-05-01), None
patent: 4-336724 (1992-11-01), None
patent: 5-113952 (1993-05-01), None
patent: 06-037848 (1994-02-01), None
patent: 7-288516 (1995-10-01), None
patent: 10-135994 (1998-05-01), None
patent: 2000-138724 (2000-05-01), None
patent: 2000-182399 (2000-06-01), None
patent: WO 96/41417 (1996-12-01), None
Japanese Office Action dated Jun. 13, 2006, 3 pages.
Japanese Office Action dated Jun. 13, 2006, 3 pages.
Japanese Office Action mailed Sep. 5, 2006 issued in Application No. 2003-328898 (English Translation included).
European Search Report mailed Aug. 21, 2006 issued in Application No. 04255663.9-2224.
Arai Hiroyuki
Hibino Takeshi
Kimura Takeshi
Motegi Shuji
Tokunaga Tetsuya
Aranda Rey
Fish & Richardson P.C.
Sanyo Electric Co,. Ltd.
LandOfFree
Interface circuit and a clock output method therefor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Interface circuit and a clock output method therefor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Interface circuit and a clock output method therefor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3794878