Interface between unsynchronised devices

Details Interface between unsynchronised devices Interface between unsynchronised devices

1994-09-27

1996-07-16

Harvey, Jack B.

Pulse or digital communications

Repeaters

Testing

375371, G06F 1300, H04L 700

Patent

active

055375570

ABSTRACT:
An interface between unsynchronised devices such as ASICs. The interface comprises a delay means which synchronises the write strobe of the first device with the system clock of the second device, thus enabling the transfer of data from the first device to the second device. The interface requires fewer gates per register in the second device than prior art interfaces.

REFERENCES:
patent: 3970997 (1976-07-01), Daly et al.
patent: 4935942 (1990-06-01), Hwang et al.
patent: 5274628 (1993-12-01), Thaller et al.
patent: 5331669 (1994-07-01), Wang et al.
IBM Tech. Discl. Bulletin, vol. 36, No. 1, Jan. 1993, pp. 104-107, "Synchronous External Bus Architecture".

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