Boots – shoes – and leggings
Patent
1978-12-21
1982-02-09
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 1300
Patent
active
043153089
ABSTRACT:
An interface between a microprocessor chip and input/output, and memory modules. The interface uses a single, bidirectional bus comprised of a number of lines which is less than the number necessary to carry a complete address word or a full width data word. Information transfer is effected by transferring information in small portions utilizing two or more interface clock cycles. An encoded control specification placed on the bus during the first cycle of information transfer specifies the type of access, the direction of transfer, and the length (number of bytes) of data to be moved. Only two additional simplex lines, one from the microprocessor and the other to the microprocessor are needed to complete the basic interface.
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Eng David Y.
Intel Corporation
Lamb Owen L.
Shaw Gareth D.
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