Interface arrangement for a telephone system or the like

Details Interface arrangement for a telephone system or the like Interface arrangement for a telephone system or the like

1983-10-12

1986-03-04

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 85, H04Q 1104, H04J 302

Patent

active

045743754

ABSTRACT:
An interface scheme is described which allows relatively convenient interconnection of, and re-configuration of, circuits for performing operations to digital signals from a bus. In one exemplary embodiment, a parallel bus, eight bits wide, having 320 channels per frame is provided. For each circuit to be connected to the parallel bus a connection memory and an input/output buffer is provided to control the accessing of the parallel bus by each circuit.

REFERENCES:
patent: 3596246 (1971-07-01), Nakagome et al.
patent: 4064360 (1977-12-01), Koenig
patent: 4335456 (1982-06-01), Gaiser et al.
patent: 4392221 (1983-07-01), Hesketh
IEEE, vol. 20, No. 6, Nov. 1982, pp. 15-23, IEEE, New York, U.S., E. A. Munter: "Digital Switch Digitalks".
IBM Technical Disclosure Bulletin, vol. 26, No. 1, Jun. 1983, pp. 267-268, New York, US; M. Demange: "Time-Division Switch Cell Using Associative Memories".
International Switching Symposium, Montreal, Sep. 21st-25th 1981, Session 21B, Paper 4, pp. 1-6, IEEE, New York, US; C. Duret et al., "Experimental Nodal Switching System".
1978 International Zurich Seminar on Digital Communications, Mar. 7-9th 1978, Paper A5, pp. 1-6, IEEE, New York; H. G. Alles, "An Intelligent Network Processor for a Digital Central Office".

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