Interface apparatus for transferring k*n-bit data packets via tr

Details Interface apparatus for transferring k*n-bit data packets via tr Interface apparatus for transferring k*n-bit data packets via tr

1993-06-29

1996-06-04

Kizou, Hassan

Multiplex communications

Wide area network

Packet switching

370 8511, 3701001, 395307, H04L 1240, H04J 302

Patent

active

055241123

ABSTRACT:
An interface device includes a data transmitter provided with a multiplexer for dividing k.times.n bits of data (k is an integer satisfying k.gtoreq.2) applied from a transmitting side data terminal equipment into k groups for time sequential output, and a data receiver provided with a data latch circuit for taking the first k-1 data groups transmitted from the data transmitter and a data latch circuit for taking the outputs from the k-1 data latch circuits and the last transmitted data group. In a period corresponding to one transmission, two data groups are supplied in time sequence from the data transmitter to the data receiver. There may be provided k data latch circuits so that the inputs of data latch circuit are all passed through the data latch circuits.

REFERENCES:
patent: 3988716 (1976-10-01), Fletcher et al.
patent: 4831514 (1989-05-01), Turlakov et al.
patent: 4864496 (1989-09-01), Triolo et al.
patent: 5113369 (1992-05-01), Kinoshita
patent: 5191581 (1993-03-01), Woodbury et al.

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