Interconnects with harmonized stress and methods for...

Details Interconnects with harmonized stress and methods for... Interconnects with harmonized stress and methods for...

2005-06-06

2009-12-29

Parker, Kenneth A (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

C257S637000, C257S640000, C257S639000, C257S751000, C257S758000

Reexamination Certificate

active

07638859

ABSTRACT:
Interconnects with harmonized stress and methods for fabricating the same. An interconnect comprises a substrate having a conductive member. A composite low-k dielectric layer interposed with at least one stress-harmonizing layer therein overlies the substrate. A conductive feature in the composite low-k dielectric layer passes through the at least one stress-harmonizing layer to electrically connect the conductive member.

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Chinese Office Action for 2006100915237.

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