Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock
Patent
1988-09-26
1990-04-17
Miller, Stanley D.
Electrical transmission or interconnection systems
Personnel safety or limit control features
Interlock
307305, 357 71, 361394, 361413, 361415, H03K 326, H01L 2348, H05K 500, H01R 2368
Patent
active
049183354
ABSTRACT:
A novel packaging system for VLSI circuits allows low-cost construction and maintenance of complex high density high-performance devices with low power requirements. The devices can be individually created by software means from a small selection of standardizable IC chips by disposing a plurality of chips in leadless chip carriers in a mosaic on a substrate, and configuring them by software to selectively communicate with other chips of the mosaic or even to individually change their operating function. The immediate juxtaposition of the chip carriers in the mosaic eliminates transmission line data skew, and also allows considerable savings in chip space and power requirements by dispensing with interconnection drivers, receivers and bonding pads. The chip carrier mosaics may be assembled into modules suitable for plug-in connection to an interconnecting backplane to create even larger devices, and individual modules can be dynamically tested in their high-performance mode by configuring one or more modules as test modules and either plugging them into modules to be tested or making them a permanent part of the device's module array.
REFERENCES:
patent: 3611317 (1971-10-01), Bonfeld
patent: 3623127 (1971-11-01), Glenn
patent: 3715629 (1973-02-01), Swengel, Sr.
patent: 4107760 (1978-08-01), Zimmer
patent: 4246597 (1981-01-01), Cole et al.
patent: 4296456 (1981-10-01), Reid
patent: 4398208 (1983-08-01), Murano et al.
patent: 4420793 (1983-12-01), Strandberg
patent: 4437141 (1984-03-01), Prokop
patent: 4484215 (1984-11-01), Pappas
patent: 4489363 (1984-12-01), Goldberg
patent: 4549200 (1985-10-01), Ecker et al.
patent: 4551746 (1985-11-01), Gilbert et al.
patent: 4578697 (1986-03-01), Takemae
patent: 4679121 (1987-07-01), Schomers et al.
Ford Aerospace Corporation
Miller Stanley D.
Phan Trong Quang
Radlo Edward J.
Weissenberger Harry G.
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