Interconnection switch structures

Details Interconnection switch structures Interconnection switch structures

2001-08-16

2003-05-13

Zweizig, Jeffrey (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

Reexamination Certificate

active

06563367

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to integrated circuit devices, and more particularly to the interconnection switches that may be used in such devices.
One of the most commonly-used type of interconnection switch is the single-transistor NMOS passgate. A typical NMOS passgate acts as a switch by selectively “passing” a signal between its source and drain terminals, depending on whether the potential difference between its gate terminal, V
GATE
, and its source terminal, V
SOURCE
, exceeds the threshold voltage, V
t
. (As is well-known in the art, there is no physical difference between the “source” and “drain” terminals of an MOS device; the source terminal of an NMOS transistor is the terminal having the lower voltage.) When V
GATE
−V
SOURCE
is less than V
t
, the NMOS passgate is in the “cutoff” state, thereby acting as an “open” switch; when V
GATE
−V
SOURCE
is greater than V
t
, the NMOS passgate is in the conduction state, thereby acting as a “closed” switch. Accordingly, a ceiling is imposed on the output of an NMOS passgate in that it cannot exceed V
GATE
−V
t
(since the NMOS passgate starts to enter the “cutoff” mode when V
GATE
−V
SOURCE
approaches V
t
). For example, when V
GATE
and a logic HIGH signal to be passed by an NMOS passgate both correspond to the positive supply level, V
DD
, the signal that may be passed is limited to V
DD
−V
t
. (As is well-known in the art, V
t
is not a discrete value for an MOS transistor; it may be considered a range of values that is influenced by a variety of second-order effects, such as substrate bias and subthreshold conduction. However, in order to simplify the illustration of the principles of the present invention, V
t
will be discussed herein as if it is a discrete value rather than a range of values.)
This limit on the logic HIGH level that may be passed by an NMOS passgate renders it problematic for use in integrated circuit devices where the operating voltages (e.g., supply voltages, bias voltages, etc.) may be low enough such that V
GATE
−V
t
may correspond to a voltage that would not be recognized as a logic HIGH signal. With the current trend in using ever-lower operating voltages, which are nearing levels comparable to V
t
, the ability of single-transistor NMOS passgate structures to reliably pass logic HIGH levels becomes more difficult in view of the influence V
t
exerts on the logic levels that may be propagated.
SUMMARY OF THE INVENTION
The present invention relates to an improved design for interconnection switches that use NMOS passgates. An improved interconnection switch that may be constructed in accordance with the principles of the present invention includes bootstrapping circuitry that allows the gate voltage of an NMOS passgate to be boosted to a higher voltage so as to increase the effective V
GATE
, thereby raising the V
GATE
−V
t
limit imposed on the logic HIGH signals that may be passed. The stimulus for this bootstrapping is the transition of the logic signal at the input terminal of the NMOS passgate, thereby obviating the need for a separate external stimulus. Because the bootstrapping occurs as a result of the dynamic coupling between the gate terminal and the channel of the NMOS passgate, the voltage across the gate oxide does not exceed the magnitude of the logic HIGH signal, thereby rendering the use of thick-oxide devices unnecessary.
Further features of the invention, its nature and various advantages will be more apparent from the accompanying drawings and the following detailed description of the invention.


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XC3000 Series Field Programmable Gate Arrays (XC3000A/L, XC3100A/L), Product Description, Nov. 9, 1998, ver. 3.1, Xilinx, Inc., pp. 7-3 through 7-78.

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