Interconnecting layer on a semiconductor substrate

Details Interconnecting layer on a semiconductor substrate Interconnecting layer on a semiconductor substrate

1991-03-06

1992-08-04

Mintel, William

357 42, 357 45, 357 67, 357 71, H01L 2702

Patent

active

051363550

ABSTRACT:
A semiconductor arrangement includes a substrate having a plurality of transistors formed therein and a tungsten layer thereon in the form of elongate tracks serving to interconnect the transistors. Localized regions of highly doped semiconductor material underlie the tracks and form an ohmic contact therewith. The tungsten layer is overlaid with an electrically insulating oxide on which further electrical interconnections are present.

REFERENCES:
patent: 4628340 (1986-12-01), Hashimoto
patent: 4689653 (1987-08-01), Miyazaki
patent: 4701777 (1987-10-01), Takayama et al.
patent: 4829359 (1989-05-01), O et al.
patent: 4905073 (1990-02-01), Chen et al.
patent: 4951114 (1990-08-01), Lewis et al.
patent: 4989062 (1991-01-01), Takahashi et al.

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