Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1996-06-26
1999-03-23
Hardy, David B.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257776, 257760, 438623, 438634, H01L 23485
Patent
active
058864105
ABSTRACT:
An interconnect system is provided. The interconnect system includes a silicon substrate and a first dielectric layer formed upon the silicon substrate. The interconnect system also includes a first level of at least two electrically conductive lines formed upon the first dielectric layer. The interconnect system further includes a region of low dielectric constant material formed between the at least two electrically conductive lines. The interconnect system also includes a first hard mask formed upon the polymer region.
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Yoshio Homma et al., Using Selective CMP with Low Permittivity Organic SOG to Achieve Low Capacitance Multilevel Interconnection Jun. 27-29, 1995 VMIC Conference 1995 ISMIC-104/95/0457.
Chiang Chien
Fang Sychyi
Fraser David B.
Ochoa Vicky M.
Pan Chuanbin
Hardy David B.
Intel Corporation
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