Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2005-05-03
2005-05-03
Williams, Alexander Oscar (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S774000, C257S759000, C257S760000, C257S700000, C257S701000, C257S522000, C257S276000, C257S667000, C257S680000, C257S773000
Reexamination Certificate
active
06888247
ABSTRACT:
An interconnect is formed on the substrate. The conductive structure at least includes a first conductive structure and a second conductive structure, which have a gap region in-between. The substrate is exposed at the gap region. A first structured dielectric layer is formed over the substrate to cover the first and the second conductive structures. The first structured dielectric layer also has a void at the gap region between the first and the second conductive structures. The void significantly extends to the whole gap region. The first structured dielectric layer also has an indent region above the void. An anti-etch layer fills the indent region of the first structured dielectric layer As a result, the first structured dielectric layer has a substantially planar surface A second structured dielectric layer is formed on the first structured dielectric layer and the anti-etch layer. The first structured dielectric layer and the second structured dielectric layer also have an opening to expose the conductive structure. When the opening is shifted to the gap region between the first conductive structure and the second conductive structure due to misalignment, the portion of the opening above the gap region stops on the anti-etch layer without opening the void.
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Hwang Tsing-Fong
Lee Ellis
J.C. Patents
United Microelectronics Corp.
Williams Alexander Oscar
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