Interconnect structure using a combination of hard dielectric an

Details Interconnect structure using a combination of hard dielectric an Interconnect structure using a combination of hard dielectric an

1996-12-19

2000-03-21

Arroyo, Teresa M.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257640, 257643, 257752, 257758, 257759, 257763, H01L 2348, H01L 2358

Patent

active

060406283

ABSTRACT:
A structure and method of fabrication of a semiconductor integrated circuit is described. A first patterned electrically conductive layer contains a low dielectric constant first insulating material such as organic polymer within the trenches of the pattern. A second insulating material such as a silicon dioxide or other insulating material having a greater mechanical strength and thermal conductivity and a higher dielectric constant than the first insulating material is formed over the first patterned electrically conductive layer. Vias within the second insulating material filled with electrically conductive plugs and a second patterned electrically conductive layer may be formed on the second insulating material. The structure can be repeated as many times as needed to form a completed integrated circuit.

REFERENCES:
patent: 4001870 (1977-01-01), Saiki et al.
patent: 5155576 (1992-10-01), Mizushima
patent: 5389814 (1995-02-01), Srikrishnan et al.
patent: 5500558 (1996-03-01), Hayashide
patent: 5616959 (1997-04-01), Jeng

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