Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2000-04-13
2002-10-15
Bowers, Charles (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S782000, C257S783000, C257S753000, C438S455000, C438S107000, C438S109000, C438S118000, C228S122100, C228S123100
Reexamination Certificate
active
06465892
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device in which layered films and wiring layers on a semiconductor substrate are bonded together using the solid state bonding technique, and a manufacturing method therefor. More particularly, it relates to an improvement intended for reducing radiation noises.
2. Description of the Related Art
In the field of semiconductor devices, there has so far been known a electromagnetic noise shield for eliminating the noise in which an electrically conductive material is applied to the perimeter of a wiring layer on a semiconductor substrate in an encapsulating fashion, as disclosed for example in Japanese Laying-Open Patent H-5-47767.
There is also known from the Japanese Laying-Open Patent H-5-47943 such a structure in an analog/digital hybrid semiconductor device in which a shield line is arranged between a high-frequency digital signal line and an analog signal line susceptible to noise, at points of intersections, and a shield line is arranged as upper and lower layers and on lateral sides of the analog signal lines.
In the above-described conventional technique, the wiring on the same semiconductor substrate is encapsulated via an insulator with an electrically conductive material to prevent the effect of the radiation noise. This structure is effective to prevent occurrence of radiation noise on the same semiconductor substrate.
However, if the radiation noise on the multi-layer semiconductor substrate is to be prohibited from occurring, the above-mentioned structure cannot directly be used.
Specifically, with the multi-layer semiconductor substrate, a multi-layer film-forming process is required. With the increasing number of layers of the multi-layer film, the surface of the multi-layer film becomes increasingly irregular such that planar smoothness is lost. If the number of layers is increased further, the film surface becomes increasingly irregular to cause line breakage in the course of the process. This indicates that difficulties are met in forming the shield line as described above.
If a higher operating speed is achieved in the semiconductor device in time to come, it becomes necessary to reduce the length of the wiring (to increase the density) and to use wirings closer to straight wirings. That is, since the radiation level is higher in keeping pace with the increase in the operating speed, it is necessary to take measures against radiation noise, to reduce the length of the wiring (to increase the density) and to use wirings closer to straight wirings.
This is intimately related to a device structure of the semiconductor substrate, such that it is necessary to attempt to increase the operating rate of the semiconductor substrate in consideration of the grounding layer, power source layer and the wiring layer surrounding the device structure.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a novel semiconductor device in which it is possible to reduce the length of the wiring, to use wirings closer to straight wirings and to take measures against radiation noise, and a method for manufacturing the novel semiconductor device.
In one aspect, the present invention provides a semiconductor device in which a plurality of semiconductor substrates, each carrying semiconductor elements, are bonded together, wherein an insulating layer is deposited on each semiconductor substrate, there being formed a connection wiring passing through the insulating layer for connection to a wiring layer on the semiconductor elements, and wherein an electrically conductive layer of an electrically conductive material, having an opening formed by patterning in register with the connection wiring, is formed on a junction surface of at least one of the semiconductor substrates. The semiconductor substrates are bonded together to interconnect the connection wirings formed on each semiconductor substrate.
In another aspect, the present invention provides a method for manufacturing a semiconductor device in which a plurality of semiconductor substrates, each carrying semiconductor elements, are bonded together, including the steps of depositing an insulating layer on a semiconductor substrate and forming a connection wiring connected to a wiring layer of the semiconductor elements in the insulating layer, forming an electrically conductive layer of an electrically conductive material, having an opening formed by patterning in register with the connection wiring, on a junction surface of at least one of the plural semiconductor substrates, smoothing the junction surface of each semiconductor substrate and applying a compressive load from both sides of the semiconductor substrates placed one on another to interconnect the semiconductor substrates and to interconnect the connection wirings formed in each semiconductor substrate.
According to the present invention, a wiring electrode and a grounding electrode are provided on each semiconductor substrate carrying semiconductor elements. An insulating layer and a grounding layer as an electrically conductive layer are deposited in this order on the surface of each semiconductor substrate. An opening is bored in the insulating layer and in the grounding layer and a grounding layer electrode and the grounding layer are electrically connected to each other via an electrically conductive material charged into the opening. The surfaces of the semiconductor substrates, formed by multiple layers, are planarized and smoothed. The planarized surfaces of the two semiconductor substrates are placed in a facing relation and aligned with respect to each other. The semiconductor substrates, thus aligned, are bonded to each other by applying loads thereon.
By this technique, that is by forming a grounding layer between the two substrates, the radiation noise generated from respective elements on the semiconductor substrate are absorbed by the grounding layer while the radiation noise generated from each element on the opposite side semiconductor substrate is similarly absorbed by the grounding layer, so that it is possible for the grounding layer to eliminate the reciprocal effect on the semiconductor elements on the semiconductor substrates. Since a common grounding layer is provided between the two substrates, it is possible to effect three-dimensional grounding interconnection via the opening to reduce the grounding wiring length.
Alternatively, a grounding layer and a power source layer, common to two semiconductor substrates, are provided between the two semiconductor substrates. That is, the wiring electrode, grounding electrode and the power source electrode are provided on one of the semiconductor substrates carrying the semiconductor elements, an insulating layer, a grounding layer and an insulating layer are sequentially formed on the surface of the semiconductor substrate, and openings are formed in the insulating layer, grounding layer and in the insulating layer. An electrically conductive member is placed in the openings. The grounding layer is electrically connected to the grounding electrode. The electrically conductive member in one of the openings is connected to the power source electrode while the electrically conductive member in the remaining opening is connected to the wiring electrode. The grounding wiring layer, power source wiring layer and the through-hole wiring are electrically insulated by an insulator, followed by surface polishing.
On the opposite side semiconductor substrate, carrying semiconductor elements, a wiring electrode, a grounding electrode and a power source electrode are provided, while an insulating layer and a power source layer are sequentially formed on the substrate surface. There are formed openings in the insulating layer and the power source layer and an electrically conductive member is placed in the openings. The grounding layer is electrically connected to the grounding electrode. The electrically conductive member in one of the openings is electrically connected to the power sour
Bowers Charles
Kielin Erik J
Oki Electric Industry Co. Ltd.
Sonnenschein Nath & Rosenthal
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