Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1997-12-23
2000-03-07
Saadat, Mahshid
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257355, 257356, 257358, 257759, H01L 2348, H01L 2352, H01L 2362
Patent
active
060344334
ABSTRACT:
A method and apparatus for preventing charge damage to a protected structure during processing of a semiconductor device. A first source/drain region of a protection transistor is coupled to a protected transistor gate. A second source/drain region of the protection transistor is coupled to ground. The protection transistor is then turned on during the processing of the device to ground the protected transistor gate.
REFERENCES:
patent: 5375095 (1994-12-01), Yamada et al.
patent: 5577004 (1996-11-01), Leshem
patent: 5623640 (1997-04-01), Nakabo
patent: 5650975 (1997-07-01), Hamade et al.
patent: 5668755 (1997-09-01), Hidaka
patent: 5694355 (1997-12-01), Skjaveland et al.
patent: 5825682 (1998-10-01), Fukui
Fenty Jesse A
Intel Corporation
Kaplan David J.
Saadat Mahshid
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