Interconnect structure for joining a chip to a circuit card

Details Interconnect structure for joining a chip to a circuit card Interconnect structure for joining a chip to a circuit card

1999-09-03

2000-09-19

Picardat, Kevin M.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

438108, 438612, 438613, H01L 2144, H01L 2148, H01L 2150

Patent

active

061210692

ABSTRACT:
A solder interconnection uses preferably lead-rich balls for making a low temperature chip attachment directly to any of the higher levels of packaging substrate. After a solder ball has been formed using standard processes, a ball limiting metal mask is formed using photoresist. A thin cap layer of preferably pure tin is deposited on a surface of the solder balls using a tin aqueous immersion process.

REFERENCES:
patent: 2964839 (1960-12-01), Marafioti et al.
patent: 5026624 (1991-06-01), Day et al.
patent: 5027188 (1991-06-01), Owada et al.
patent: 5060844 (1991-10-01), Behun et al.
patent: 5075965 (1991-12-01), Carey et al.
patent: 5217597 (1993-06-01), Moore et al.
patent: 5264325 (1993-11-01), Allen et al.
patent: 5278010 (1994-01-01), Day et al.
patent: 5300402 (1994-04-01), Card et al.
patent: 5316788 (1994-05-01), Dibble et al.
patent: 5324569 (1994-06-01), Nagesh et al.
patent: 5341564 (1994-08-01), Akhavain et al.
patent: 5376584 (1994-12-01), Agarwala
patent: 5384283 (1995-01-01), Gegenwarth et al.
patent: 5473814 (1995-12-01), White
patent: 5492235 (1996-02-01), Crafts et al.
patent: 5668059 (1997-09-01), Ghristie et al.
patent: 5777391 (1998-07-01), Nakamura et al.
patent: 5796591 (1998-08-01), Daeal et al.
patent: 5838069 (1998-11-01), Itai et al.
E.J. Armstrong, "Dendrite Connector System with Reinforced Base", IBM Technical Disclosure Bulletin, vol. 23, No. 8, p. 3631, Jan. 1981.
C.H. Crockett et al., "UV Image Reworkable Encapsulent for Fatigue Life Enhancement", IBM Technical Disclosure Bulletin, vol. 37, No. 5, p. 127, May 1994.
Shipley, "Tinposit LT-26" Operating Manual, .COPYRGT.1987, (8) pages.
Shipley, "Tinposit LT-34" Operating Manual, .COPYRGT.1984, (4) pages.
G.J. Gaudenzi et al., "Socketed Package for Surface Mount Applications", IBM Technical Disclosure Bulletin, vol. 36, No. 12, pp. 325-326, Dec. 1993 .

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