Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2005-07-19
2005-07-19
Fourson, George (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S773000, C257S774000, C257S775000, C257S776000, C257S762000
Reexamination Certificate
active
06919637
ABSTRACT:
An interconnect structure for an integrated circuit having several levels of conductors is disclosed. Dielectric pillars for mechanical support are formed between conductors in adjacent layers at locations that do not have vias. The pillars are particularly useful with low-k ILD or air dielectric.
REFERENCES:
patent: 5783864 (1998-07-01), Dawson et al.
patent: 2002/0145201 (2002-10-01), Armbrust et al.
He Jun
Maiz Jose
Park Hyun-Mog
Blakely , Sokoloff, Taylor & Zafman LLP
Fourson George
Intel Corporation
Pham Thanh V.
LandOfFree
Interconnect structure for an integrated circuit and method... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Interconnect structure for an integrated circuit and method..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Interconnect structure for an integrated circuit and method... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3367407