Interconnect structure

Details Interconnect structure Interconnect structure

2002-01-29

2004-06-29

Nhu, David (Department: 2818)

Semiconductor device manufacturing: process

With measuring or testing

C438S128000

Reexamination Certificate

active

06756244

ABSTRACT:

BACKGROUND OF THE INVENTIONS
1. Field of the Inventions
The present inventions are related to interconnect structures and, more specifically, to interconnect structures that may, for example, be used in conjunction with testing equipment.
2. Description of the Related Art
Interconnect structures are used in a wide variety of applications to electrically connect two devices to one another. Although the present inventions are not limited to any particular application, one application of interconnect structures is associated with the test procedures that are performed on wafers that include semiconductor components both during and after the fabrication process. The tests require that temporary electrical contact be made with contacts on the semiconductor components so that signals may be transferred to and from the components during the tests. Conventional testing equipment typically includes a series of pin contacts for this purpose. The pin contacts are part of an interconnect structure (sometimes referred to as a “probe card”) that is manufactured using mechanical machining and assembly processes. Some wafers also have components, such as electron emitters, which emit signals that can be sensed to determine whether the component is operating properly. Some wafers are also tested with probes that supply a predetermined stimulus, such as light, to a particular component. The response to the stimulus, e.g. an electrical or optical signal, is then measured to determine whether the component is functioning properly.
The density and number of semiconductor component contacts has, of course, increased as semiconductor components have become smaller and smaller. The inventor herein has determined that, given the ever increasing density of semiconductor component contacts, conventional interconnect structures and the methods of manufacturing such interconnect structures are susceptible to improvement. For example, it is difficult, labor intensive and expensive to manufacture conventional pin contacts because the locational tolerances, both in and out of the semiconductor component plane, have become smaller as the density of the semiconductor component contacts has increased. Moreover, the increased number of component contacts has resulted in a corresponding increase in the number of pin contacts, which further increases the cost of manufacture. The inventor herein has also determined that the conventional methods of sensing emissions from wafer components, which is to do the testing after wafer has been diced and additional manufacturing steps (such as packaging) are performed on the individual chips, can be inefficient because the additional manufacturing steps are wasted in those instances where the wafer component is ultimately shown to be defective.


REFERENCES:
patent: 5627101 (1997-05-01), Lin et al.
patent: 5835359 (1998-11-01), DiFrancesco
patent: 6078186 (2000-06-01), Hembree et al.
patent: 6147506 (2000-11-01), Ahmad et al.
patent: 6242935 (2001-06-01), Akram
patent: 6246245 (2001-06-01), Akram et al.
patent: 6264477 (2001-07-01), Smith et al.
patent: 6278286 (2001-08-01), Farnworth et al.
patent: 6405429 (2002-06-01), Slemmons et al.

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