Interconnect logic

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Details

307207, 364716, G06F 1300

Patent

active

041258690

ABSTRACT:
The interconnect logic circuit for supplying input data to a register and recirculating data in the register includes a programmable logic array (PLA) and a recirculation control circuit connected between an output of the PLA and an input of the register and between an output and an input of the register. The recirculation control circuit includes a first transfer gate for sensing and storing information corresponding to the presence or absence of a command to supply input data, and a second transfer gate connected between an output and an input of the register and responsive to the stored information. The recirculation control circuit also includes a circuit for preventing the input data from being inputted to the PLA during a first time period, such that only a command to load that input data is sensed at an output of the PLA during that first time period. In the absence of a command to load input data into the register, the second transfer gate is enabled during a time period subsequent to the first time period to recirculate data in the register. In the presence of a command to load input data, the second transfer gate is disabled during the subsequent time period, the input data is passed through the PLA, and input data is supplied to the register. A method of channelling data to a register includes the steps of sensing the presence of a command to load input data for supplying such input data to the register, and sensing the absence of such a command to recirculate data in the register.

REFERENCES:
patent: 3328772 (1967-06-01), Oeters
patent: 3603774 (1971-09-01), DE Varda et al.
patent: 3611309 (1971-10-01), Zingg
patent: 3755788 (1973-08-01), Finch
patent: 3914744 (1975-10-01), Brown
patent: 3916175 (1975-10-01), Lauer et al.

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