Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With provision to conduct electricity from panel circuit to...
Reexamination Certificate
2001-11-30
2003-08-26
Gilman, Alexander (Department: 2833)
Electrical connectors
Preformed panel circuit arrangement, e.g., pcb, icm, dip,...
With provision to conduct electricity from panel circuit to...
Reexamination Certificate
active
06609915
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an interconnect having peripheral leads. The interconnect is particularly adapted for connecting a multi-chip module or a PCB to a circuit substrate such as a PCB to form a circuit assembly. The invention also relates to processes for making and using an interconnect having peripheral leads.
2. Brief Description of Prior Developments
Numerous interconnect devices are employed in electronic packaging for electronic devices. U.S. Pat. Nos. 5,558,271, 6,034,423, 6,041,495, and 6,071,754 illustrate many of these approaches such as the use of lead and tape frames, ball grid arrays, and flip-chip interconnects.
Pin and socket type interconnects for stacking modules are described in U.S. Pat. Nos. 5,460,531 and 5,613,033.
U.S. Pat. No. 5,069,626 discloses a semiconductor device package comprising a molded polymeric substrate having castellated leads. The interconnect of this electronic package does not connect a multi-chip module or a PCB to a circuit board. It is a component package providing an integrated circuit to board connection. In contrast in accordance with this invention a multi-chip device package or PCB is connected to a circuit substrate or PCB by a separate interconnect member having leads in peripheral depressions.
U.S. Pat. No. 5,247,423 discloses stackable multi-chip modules employing a plurality of edge metal conductors that form half-vias which provide a castellated appearance. Solder plated wires are fitted within the half-vias and reflowed to the conductor traces to interconnect the semiconductor devices of the modules. In contrast in accordance with this invention a multi-chip device package or PCB is connected to a circuit substrate by a separate interconnect member having leads in peripheral depressions.
SUMMARY OF THE INVENTION
In accordance with one preferred embodiment of the invention an interconnect is provided for attaching a module such as a PCB or a multi-chip module to a circuit substrate. A member elongated in a longitudinal direction has at least a first elongated side and a second opposed and generally parallel elongated side. The first and second sides extend in a longitudinal direction. Each of the first and second sides has at least one portion formed by a series of depressions in the respective first and second sides extending inwardly from a first outer surface of the first side and a second outer surface of the second side. The depressions are metallized to form leads.
In accordance with another preferred embodiment of the invention a multi-chip module circuit assembly is provided comprising a multi-chip module, a circuit substrate and at least one interconnect. The multi-chip module includes a plurality of electronic elements. The circuit substrate supports a conductive circuit pattern adapted for connection to the multi-chip module. At least one interconnect in accordance with the previous embodiment attaches the multi-chip module to the circuit pattern on the circuit substrate. The leads of the interconnect member connect at least one of the electronic elements of the multi-chip module to the conductive circuit pattern of the circuit substrate. The circuit assembly preferably includes a plurality of the interconnect members of this invention connected between the multi-chip module and the circuit substrate.
In a particularly preferred embodiment of the circuit assembly the multi-chip module includes a first major face and a second opposed major face. First electronic elements are supported on the first face and additional second electronic elements are supported on the second face. The interconnect members space the multi-chip module from the circuit substrate by an amount greater than the thickness of electronic elements arranged on the multi-chip module between the multi-chip module and the circuit substrate. Preferably at least two of the interconnect members connect the multi-chip module to the circuit substrate.
In accordance with yet another preferred embodiment of the invention a process for making an interconnect for attaching a multi-chip module to a circuit substrate is provided. The processes comprises providing a member elongated in a longitudinal direction. A series of circuit pads are formed on opposing major faces of the member. The circuit pads are arranged in at least two lines in the longitudinal direction on each of the major faces. The circuit pads in a line on one major face of the member are aligned with respective opposing circuit pads on the other major face of the member. A series of openings are formed in the circuit pads. The openings extend through the member and at least one circuit pad on one of the major faces and at least another circuit pad on the opposing major face. The openings are arranged in the at least two lines. A conductive metalization is formed in the openings for electrically connecting each of the one circuit pads to a respective one of the another circuit pads. The member is divided along a generally central axis of the openings in the at least two lines to provide at least one interconnect member as described in the first embodiment of the invention.
In accordance with a still further preferred embodiment of the invention a process is provided for attaching a multi-chip module to a circuit substrate. The process of this embodiment comprises providing a multi-chip module, a circuit substrate and at least one interconnect member of the type described in the previous preferred embodiments. The multi-chip module has a plurality of electronic elements. The circuit substrate supports thereon a conductive circuit pattern adapted for connection to the multi-chip module. The at least one interconnect member includes metallized depressions which form leads for connecting at least one electronic element of the multi-chip module to the conductive circuit pattern of the circuit substrate. A sub-assembly is formed by attaching the at least one interconnect member to the multi-chip module to make a desired electrical connection between at least one of the leads of the interconnect member and the at least one electronic element. The sub-assembly is then attached to the circuit substrate to make at least one desired electrical connection between the at least one lead of the interconnect member and the conductive circuit pattern of the circuit substrate.
In a particularly preferred embodiment of this process embodiment the multi-chip module includes a first major face and a second opposed major face. First electronic elements are supported on the first face and additional second electronic elements are supported on the second face. The interconnect members are formed so as to space the multi-chip module from the circuit substrate by an amount greater than the thickness of electronic elements arranged on the multi-chip module between the multi-chip module and the circuit substrate. Preferably at least two of the interconnect members are connected between the multi-chip module and the circuit substrate.
REFERENCES:
patent: 4059849 (1977-11-01), Mitchell
patent: 4671984 (1987-06-01), Maeda et al.
patent: 4956694 (1990-09-01), Eide
patent: 6373714 (2002-04-01), Kudoh et al.
Adams Christopher Scott
Beardsley Scott Brian
FCI Americas Technology
Gilman Alexander
Harrington & Smith ,LLP
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