Interconnect for chip level power distribution

Details Interconnect for chip level power distribution Interconnect for chip level power distribution

2007-04-04

2010-11-09

Warren, Matthew E (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S690000, C257S777000, C257SE23013, C257SE23151, C257SE23153, C257SE23175

Reexamination Certificate

active

07829997

ABSTRACT:
A semiconductor device (601) is provided which comprises a substrate (603); a semiconductor device (605) disposed on said substrate and having a first major surface; a first metal strap (615) which is in electrical contact with said substrate and which is adapted to provide power to a first region (608) of said semiconductor device; and a second metal strap (616) which is in electrical contact with said substrate and which is adapted to provide ground to a second region (609) of said semiconductor device.

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