Inter-stage coupling in multistage amplifiers

Details Inter-stage coupling in multistage amplifiers Inter-stage coupling in multistage amplifiers

2003-02-18

2004-11-02

Mottola, Steven J. (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including plural stages cascaded

C330S260000

Reexamination Certificate

active

06812796

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to multistage amplifiers and in particular to high frequency multistage amplifiers with improved inter-stage coupling.
BACKGROUND OF THE INVENTION
Multistage amplifiers may be used in a variety of applications including optical communication systems, satellite communication systems, and mobile communication systems to name only several. In multistage amplifiers, one gain stage may have an adverse affect on a previous stage. This may lead to degradation in overall amplifier performance causing disturbances in output parameters such as frequency response and transitive characteristics.
For instance, a multistage amplifier may have a gain stage including a differential pair with bipolar transistors. Such a differential pair may have a significant capacitive component of the input impedance. This capacitive component plays a dominant role at high frequencies which may impact the performance of a buffer preceding the differential pair. The buffer is typically extremely sensitive to such a capacitive component of the load input impedance. The capacitive component can cause an undesirable high frequency peak on the frequency response curve for the gain stage. This undesirable high frequency peak leads to excessive overshoot and undershoot by as much as 10% of the peak to peak pulse amplitude in the transitive characteristic.
Accordingly, there is a need in the art for a multistage amplifier having improved inter-stage coupling to overcome the above drawbacks of one gain stage adversely affecting a previous gain stage in a multistage amplifier.
BRIEF SUMMARY OF THE INVENTION
A multistage amplifier consistent with the invention includes a first gain stage having a first input terminal and a first output terminal, and a second gain stage having a first input terminal. A first inter-stage resistive element is coupled in series to the first output terminal of the first gain stage and the first input terminal of the second gain stage.
In a further aspect of the invention, a gain stage for a multistage amplifier includes a differential pair having a first transistor and a second transistor. A first feedback path is coupled between a first terminal and a control terminal of the first transistor. The first feedback path is configured to provide a first feedback signal to the control terminal of the first transistor representative of a first signal level at the first terminal of the first transistor. A second feedback path is coupled between a first terminal and a control terminal of the second transistor. The second feedback path is configured to provide a second feedback signal to the control terminal of the second transistor representative of a second signal level at the first terminal of the second transistor.
According to yet a further aspect of the invention there is provided a gain stage for a multistage amplifier including a differential pair, and a feedback path coupled to a first terminal and a control terminal of each pair of transistors of the differential pair. The feedback path is configured to provide a feedback signal to the control terminal representative of a signal at the first terminal.
According to another aspect of the invention there is provided a method of reducing the effect of an imaginary component of an input impedance of a differential stage on a preceding gain stage in a multistage amplifier. The method consistent with the invention includes the steps of: monitoring a signal at a first terminal of each transistor of the differential pair; providing a feedback signal to a control terminal of each transistor of the differential pair; and adjusting the signal at the first terminal of each transistor based on the feedback signal.


REFERENCES:
patent: 4296383 (1981-10-01), Jeandot et al.
patent: 5440271 (1995-08-01), Laws
patent: 6069523 (2000-05-01), Brown
patent: 6275104 (2001-08-01), Holter
patent: 6380804 (2002-04-01), Ross
patent: 6462622 (2002-10-01), Mori et al.

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