Electrical computers and digital processing systems: multicomput – Multicomputer data transferring via shared memory
Reexamination Certificate
2006-07-18
2006-07-18
Thai, Tuan V. (Department: 2189)
Electrical computers and digital processing systems: multicomput
Multicomputer data transferring via shared memory
C711S129000, C711S130000, C711S147000, C711S153000, C709S214000, C709S215000
Reexamination Certificate
active
07080128
ABSTRACT:
When communications among a plurality of processors employed in a network storage system are required, any of the processors initiating a communication on the transmission side issues a request to an I/O processing apparatus, which is used for controlling a disk unit and a disk cache common to the processors, in order to allocate an area in the common disk cache as a communication buffer. At such a request, the I/O processing apparatus allocates a specific area in the common disk cache as a communication buffer and gives a notice of the allocation to the requesting processors on the transmission side. Receiving the notice, the transmission-side processors write data to be transferred into the specific area of the disk cache and, then, the reception-side processors fetch the transferred data from the specific area.
REFERENCES:
patent: 4564900 (1986-01-01), Smitt
patent: 5263142 (1993-11-01), Watkins et al.
patent: 5437047 (1995-07-01), Nakamura
patent: 5446841 (1995-08-01), Kitano et al.
patent: 5920893 (1999-07-01), Nakayama et al.
patent: 5924097 (1999-07-01), Hill et al.
patent: 6018763 (2000-01-01), Hughes et al.
patent: 6055605 (2000-04-01), Sharma et al.
patent: 6088771 (2000-07-01), Steely et al.
patent: 6108693 (2000-08-01), Tamura
patent: 6108737 (2000-08-01), Sharma et al.
patent: 6112281 (2000-08-01), Bamford et al.
patent: 6212610 (2001-04-01), Weber et al.
patent: 6253290 (2001-06-01), Nakamoto
patent: 6381674 (2002-04-01), DeKoning et al.
patent: 6449699 (2002-09-01), Franke et al.
patent: 6754785 (2004-06-01), Chow et al.
patent: 6813684 (2004-11-01), Sakaguchi et al.
patent: 2002/0004845 (2002-01-01), Yamamoto et al.
patent: 2002/0062352 (2002-05-01), Asano et al.
patent: 2002/0069334 (2002-06-01), Hsia et al.
patent: 2002/0116469 (2002-08-01), Okuyama
patent: 2002/0174258 (2002-11-01), Dale et al.
patent: 2002/0184328 (2002-12-01), Richardson et al.
patent: 2002/0198953 (2002-12-01), O'Rourke et al.
patent: 2003/0005071 (2003-01-01), Kanoh
patent: 2003/0088636 (2003-05-01), Nakamura
patent: 2002-23958 (2000-07-01), None
International Business Machines, Parallel System Support, “Managing Shared Disks”, Version 3, Release 2, Apr. 2000, pp. 1-2.
International Business Machines, Parallel System Support, “Managing Shared Disks—Table of Contents”, Version 3, Release 2, Apr. 2000, pp. 1-5.
International Business Machines, Parallel System Support, “Managing Shared Disks—Tuning Virtual Shared Disk Performance”, Version 3, Release 2, Apr. 2000, pp. 1-7.
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Hitachi , Ltd.
Reed Smith LLP
Thai Tuan V.
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