Inter-procedure global register allocation method

Details Inter-procedure global register allocation method Inter-procedure global register allocation method

2006-06-27

2006-06-27

Zhen, Wei (Department: 2191)

Data processing: software development, installation, and managem

Software program development tool

Translation of code

C717S151000, C717S153000, C717S155000

Reexamination Certificate

active

07069548

ABSTRACT:
Embodiments of the present invention provide a method and system for optimizing processor register allocation. Variables from an acyclic call graph having a plurality of functions may be identified and a plurality of virtual registers may be created by assigning each of the identified variables to at least one virtual register. An interference graph may be constructed based on the plurality of virtual registers and may be colored with a plurality of physical registers. If the interference graph is not colorable, then at least one virtual register may be spilled from the interference graph.

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