Intelligent SMT thread hang detect taking into account...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

Reexamination Certificate

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Details

C712S219000

Reexamination Certificate

active

07343476

ABSTRACT:
Monitoring is performed to detect a hang condition. A timer is set to detect a hang based on a core hang limit. If a thread hangs for the duration of the core hang limit, then a core hang is detected. If the thread is performing an external memory transaction, then the timer is increased to a longer memory hang limit. If the thread is waiting for a shared resource, then the timer may be increased to the longer memory hang limit if another thread or, more particularly, the thread blocking the resource has a pending memory transaction. Responsive to detecting a hang condition, instructions dispatched to the plurality of execution units may be flushed, or the processor may be reset and restored to a previously known good, checkpointed architected state.

REFERENCES:
patent: 5325499 (1994-06-01), Kummer et al.
patent: 6543003 (2003-04-01), Floyd et al.
patent: 6665758 (2003-12-01), Frazier et al.

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