Intelligent hardware for automatically controlling buffer memory

Details Intelligent hardware for automatically controlling buffer memory Intelligent hardware for automatically controlling buffer memory

1992-01-31

1995-09-12

Shin, Christopher B.

Boots, shoes, and leggings

395821, 3642396, 3642397, 3642383, 364DIG1, G06F 300

Patent

active

054505461

ABSTRACT:
An integrated disk controller integrated circuit in a disk drive includes the buffer room logic hardware of this invention within a buffer control circuit. The buffer room logic hardware monitors the status of a buffer memory as data are written into and read from the buffer memory in data transfers between a disk and another device, typically a computer. When the buffer memory is either full or empty, the buffer room logic hardware automatically generates signals that control subsequent data transfer to or from the buffer memory. Therefore, the buffer room logic hardware prevents buffer overruns and buffer underruns without intervention or other action by a microprocessor. When the buffer memory is empty, data transfer is either terminated or suspended until data become available in the buffer memory. When the buffer memory is full, the buffer room logic hardware either generates a signal that terminates the data transfer or generates a signal that suspends further data transfer until space becomes available in the buffer memory. In one embodiment, the buffer room logic hardware does not permit resumption of data transfer until a predetermined threshold value of space is available in the buffer memory.

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