Integrator circuit

Details Integrator circuit Integrator circuit

1990-07-30

1992-04-28

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307353, 307246, H03K 500

Patent

active

051091690

ABSTRACT:
An integrator circuit for input signals consisting sampled analogue currents has an input connected to a node (2). Also connected to the node (2) are a first current memory cell (C1, T1, S2) and a second current memory cell (C2, T2, T3, S3). The switches (S1, S3) are operated on opposite phases of a clock signal synchronized with the sampling period. The first current memory cell produces an output current when switch (S2) is open, whereas the second current memory cell produces a first output when switch (S3) is open and a second output (T3) which is connected to the output (6) of the integrator and which is continuously available. Forward or Backward Euler mapping is produced by closing switch (S1) on appropriate phases of the clock signal. A Bilinear mapping can be produced by connecting an inverted version of the input signal to a second input (8) and appropriately clocking the switches (S1, S4). A feedforward function can be added by the use of a further input (9) directly connected to the node (2).
Various higher performance current memory cells are also disclosed together with fully differential versions of the integrator.

REFERENCES:
patent: 3671782 (1972-06-01), Wittlinger et al.
patent: 4429281 (1984-01-01), Ito et al.
patent: 4785250 (1988-11-01), Lawton
patent: 4839542 (1989-06-01), Robinson
patent: 4845382 (1989-07-01), Eouzan et al.
patent: 4864217 (1989-09-01), Bird
patent: 4958123 (1990-09-01), Hughes
John B. Hughes, Neil C. Bird and Ian C. MacBeth entitled; ISCAS, Feb. 1989; pp. 1584-1587, "Switched Currents--A New Technique for Analog Sampled-Data Signal Processing".

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