Integration of MOM capacitor into dual damascene process

Details Integration of MOM capacitor into dual damascene process Integration of MOM capacitor into dual damascene process

1999-11-22

2000-09-12

Bowers, Charles

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

H01L 2120

Patent

active

061177474

ABSTRACT:
A method for fabricating a metal-oxide-metal capacitor using a dual damascene process is described. A dielectric layer is provided overlying a semiconductor substrate. A dual damascene opening in the dielectric layer is filled with copper to form a copper via underlying a copper line. A first metal layer is deposited overlying the copper line and patterned to form a bottom capacitor plate contacting the copper line. A capacitor dielectric layer is deposited overlying the bottom capacitor plate. A second metal layer is deposited overlying the capacitor dielectric layer and patterned to form a top capacitor plate to complete fabrication of a metal-oxide-metal capacitor.

REFERENCES:
patent: 5406447 (1995-04-01), Miyazaki
patent: 5479316 (1995-12-01), Smrtic et al.
patent: 5736448 (1998-04-01), Saia et al.
patent: 5812364 (1998-09-01), Oku et al.
patent: 5813664 (1998-09-01), Pan
patent: 5946567 (1999-08-01), Weng et al.

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