Integration of filter into read/write preamplifier...

Details Integration of filter into read/write preamplifier... Integration of filter into read/write preamplifier...

1997-06-24

2001-10-23

Nguyen, Hoa T. (Department: 2651)

Dynamic magnetic information storage or retrieval

General processing of a digital signal

Head amplifier circuit

Reexamination Certificate

active

06307693

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of storing data in and obtaining data from a magnetic media storage system. More particularly, the present invention relates to the field of obtaining data from the magnetic media storage system and transmitting data to a read channel.
BACKGROUND
In magnetic media storage systems for computers, such as hard disk drives, digital data is used to modulate the current in a read/write head coil so that a sequence of corresponding magnetic flux transitions are written onto a magnetic medium in data tracks. To read this recorded data, the read/write head passes over the magnetic medium and transduces the magnetic transitions into pulses of an analog signal that alternates in polarity. The analog signal is provided to and decoded by read channel circuitry to reproduce the digital data.
Within the read channel, decoding the pulses into a digital sequence is performed by a peak detector circuit in a conventional analog read channel or by using a discrete time sequence detector circuit in a sampled amplitude read channel. Threshold crossing or derivative information, implemented in analog circuitry, is normally used in conventional peak detection schemes to detect peaks in the continuous time analog signal generated by the read head. The analog read signal is “segmented” into bit cell periods and interpreted during these segments of time. The presence of a peak during the bit cell period is detected as a logical “1”, whereas the absence of a peak during a bit cell period is detected as a logical “0”.
A block diagram of a storage media system and a read channel is illustrated in FIG.
1
. The storage media system
10
includes a storage medium
12
, a read/write head
14
and a pre-amplifier
16
. The read/write head
14
writes information to and reads information from the magnetic medium
12
. While only a single storage medium
12
and read/write head
14
are shown in the block diagram of
FIG. 1
, it should be apparent to those skilled in the art that the storage media system may include multiple storage media and read/write heads from which data can be written to or read from. Within the storage media system
10
, the read/write head
14
is coupled to the pre-amplifier circuit
16
to provide an analog output signal An Out representing the data read from the magnetic medium
12
.
The read channel
22
is typically included on the motherboard
20
within the host system. Among other circuits, the read channel
22
includes an amplifier
24
, a filter
26
and a peak detection circuit
28
. The analog output signal An Out from the pre-amplifier circuit
16
is coupled as an input to the amplifier
24
. An output of the amplifier
24
is coupled to the filter
26
. An output of the filter
26
is coupled to the peak detection circuit
28
. A clock signal
30
from the motherboard is also coupled to the peak detection circuit
28
. A read channel output signal RD from the peak detection circuit
28
is coupled to a host system bus
32
in order to provide the digital representation of the analog signal output from the storage media system
10
to other components within the host system. This digital representation represents the data read from the storage medium
12
.
A timing diagram of signals taken at various points within the system illustrated in
FIG. 1
is illustrated in
FIG. 2. A
timing diagram of the analog output signal An Out of the amplifier
16
is illustrated in
FIG. 2
a
. A timing diagram of the clock signal
30
is illustrated in
FIG. 2
b
. A timing diagram of a read channel output signal RD corresponding to the analog output signal An Out is illustrated in
FIG. 2
c
. The timing diagram of the read channel output signal RD is divided into three time segments
60
,
62
and
64
, each of which include four bits of information.
The analog output signal An Out, illustrated in
FIG. 2
a
, shows an example of an analog signal read by the read/write head
14
from the magnetic media
12
representing data stored on the magnetic media
12
. The analog output signal An Out is provided to the read channel
22
from the preamplifier circuit
16
. Within the read channel
22
, the analog output signal An Out is then amplified by the amplifier
24
and filtered by the filter
26
before it is converted to a digital data signal and output by the peak detection circuit
28
. The peak detection circuit
28
segments the analog output signal An Out into bit cells, corresponding to the pulses of the clock signal
30
and each representing one bit of information. The presence of a peak, either above or below an appropriate one of the transition lines
40
and
42
during a bit cell, is detected by the peak detection circuit
28
as a logical “1.” The absence of a peak during a bit cell, is detected by the peak detection circuit
28
as a logical “0.” Other data recovery systems are also well known.
There is a delay td from the time the peak occurs during the bit cell to the time the read channel output signal RD transitions to a logical high voltage level. This delay td is referred to as a group delay. The frequency of transitions on the read channel output signal RD, as illustrated in
FIG. 2
c
, changes from the time segment
60
to the time segment
62
. During a time segment when there are few transitions to a logical high voltage level, such as the time segment
60
, the frequency of the transitions is low. During a time segment when there are multiple sequential transitions to a logical high voltage level, such as the time segment
62
, the frequency of the transitions is high. Because the time segment
62
includes four logical “1s”, the read channel output signal RD has a higher frequency during this time segment
62
than during the time segment
60
which includes only a single logical “1.” It is desirable in a read channel that the group delay time period td remains constant as the frequency of the read channel output signal RD is fluctuating.
The pre-amplifier circuit
16
is generally included within a read/write chip coupled inside the storage media system
10
. Typically, the read/write chip is encapsulated in a surface mount package and bound by the specifications that it is to dissipate the minimum possible power and add the minimum possible spurious electrical noise to the signal. The small signals extracted from the magnetic media
12
by the read/write head
14
may also be accompanied by spurious signals induced through capacitive or inductive coupling and wide band noise. These spurious signals are typically eliminated to a first order by the filter
26
within the read channel
22
.
The quality of the signal provided to the peak detection circuit
28
is extremely important to the correspondence of the read channel output signal RD to the data read from the magnetic media
12
. Errors in detection will occur when the bit cells are not correctly aligned with the analog pulse data or the signal provided to the peak detection circuit
28
includes noise which causes extra peaks to be detected and output, causing the signal output by the read channel to differ from the data read from the magnetic media
12
. It is important to preserve the quality of the signal output from the storage media system
10
through the read channel
22
in order to get a true digital representation of the data read from the storage medium
12
.
SUMMARY OF THE INVENTION
A magnetic media storage system output circuit includes a filter for filtering an analog output signal from the storage media system before the analog output signal is provided to a read channel. Within the magnetic media storage system a read/write head reads data from a magnetic medium and provides an analog signal representing the data to an output circuit. The output circuit includes the filter for filtering the analog output signal and a pre-amplifier circuit for amplifying and transmitting the analog output signal to a read channel. Preferably, the filter has a linear frequency response and constant group delay below the cutoff frequency. Current on

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