Integrating circuit having high time constant, low bandwidth fee

Details Integrating circuit having high time constant, low bandwidth fee Integrating circuit having high time constant, low bandwidth fee

1996-10-11

1999-08-17

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

By integrating

327345, 327552, 327156, H03K 408

Patent

active

059399244

ABSTRACT:
This invention relates to an integrating circuit and finds application in high time constant low bandwidth feedback loop arrangements, e.g. in phase locked loop circuits. A well-known form of integrator is the Miller integrator, as used in Phase Lock Loop circuits (PLL) which are frequently used in communication systems, and are employed, for example, in clock extraction circuits in optical fiber receivers. With the advent of Passive Optical Networks (PON) becoming a means of providing fiber to the home very accurate timing information is required, to allow the outstation optical transmitter to send data within its designated time slot. The timing source at the base station needs to have a narrow jitter bandwidth of no more than, typically, 0.1 Hz, which cannot be realized with known phase lock loop circuits. The present invention seeks to provide an improved integrator which allows the fabrication of such timing circuits using standard components.

REFERENCES:
patent: 4064406 (1977-12-01), Tiemeijer
patent: 5376892 (1994-12-01), Gata
Huelsman, "Basic Circuit Theory", 3rd edition, pp. 596-599, 1972.

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