Integrating ADC having memory capacitor connected to integrator

Details Integrating ADC having memory capacitor connected to integrator Integrating ADC having memory capacitor connected to integrator

1992-02-25

1993-06-01

Logan, Sharon D.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

H03M 150

Patent

active

052164268

ABSTRACT:
An integrating analog-to-digital converter comprising an integrator, a memory capacitor for memorizing the potential of an integrated output from the integrator, a comparator for comparing the potential memorized in the memory capacitor and the potential of the integrated output divided by a set of potential dividing resistances, a clock pulse generating circuit, a counter for counting the period until the integrated output of the reference voltages passes through a reference level using clock pulses, and a reversible counter for counting the period from when the integrated output passes through the reference level to when the integration is completed, by the clock pulses, and for adding its value to the counted value from the counter as low order digits; wherein the number of digits of AD conversion is increased, and high conversion accuracy and high resolution are realized by enlarging the time period from the reference level crossing point to a clock pulse immediately after the crossing in the reference voltage integrating period, and by counting the time using the clock pulses.

REFERENCES:
patent: 3674937 (1972-07-01), Bellanger et al.
patent: 3818246 (1974-06-01), Hellwarth et al.
patent: 4034364 (1977-07-01), Fukuda et al.
patent: 4117477 (1978-09-01), Zitelli et al.
patent: 4243975 (1981-01-01), Masuda et al.
patent: 4567465 (1986-01-01), Komiya

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